Bryan Sheffield

According to our database, Bryan Sheffield authored at least 2 papers between 2017 and 2018.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2018

A 5GHz 7nm L1 cache memory compiler for high-speed computing and mobile applications.

Michael Clinton, Rajinder Singh, Marty Tsai, Shayan Zhang, Bryan Sheffield, Jonathan Chang

Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

2017

12.3 A low-power and high-performance 10nm SRAM architecture for mobile applications.

Michael Clinton, Hank Cheng, Hung-Jen Liao, Robin Lee, Ching-Wei Wu, Johnny Yang, Hau-Tai Hsieh, Frank Wu, Jung-Ping Yang, Atul Katoch, Arun Achyuthan, Donald Mikan, Bryan Sheffield, Jonathan Chang

Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017