Atul Katoch

According to our database, Atul Katoch authored at least 13 papers between 2003 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

A 3nm 256Mb SRAM in FinFET Technology with New Array Banking Architecture and Write-Assist Circuitry Scheme for High-Density and Low-VMIN Applications.

Jonathan Chang, Yen-Huei Chen, Gary Chan, Kuo-Cheng Lin, Po-Sheng Wang, Yangsyu Lin, Sevic Chen, Peijiun Lin, Ching-Wei Wu, Chih-Yu Lin, Yi-Hsin Nien, Hidehiro Fujiwara, Atul Katoch, Robin Lee, Hung-Jen Liao, Jhon-Jhy Liaw, Shien-Yang Michael Wu, Quincy Li

Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

2017

12.3 A low-power and high-performance 10nm SRAM architecture for mobile applications.

Michael Clinton, Hank Cheng, Hung-Jen Liao, Robin Lee, Ching-Wei Wu, Johnny Yang, Hau-Tai Hsieh, Frank Wu, Jung-Ping Yang, Atul Katoch, Arun Achyuthan, Donald Mikan, Bryan Sheffield, Jonathan Chang

Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

2008

A 500MHz Random-Access Embedded 1Mb DRAM Macro in Bulk CMOS.

Sergey Romanovsky, Atul Katoch, Arun Achyuthan, C. O'Connell, Sreedhar Natarajan, C. Huang, Chuan-Yu Wu, Min-Jer Wang, C. J. Wang, P. Chen, R. Hsieh

Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

2005

New ECC for Crosstalk Impact Minimization.

Daniele Rossi, André K. Nieuwland, Atul Katoch, Cecilia Metra

IEEE Des. Test Comput., 2005

Exploiting ECC Redundancy to Minimize Crosstalk Impact.

Daniele Rossi, André K. Nieuwland, Atul Katoch, Cecilia Metra

IEEE Des. Test Comput., 2005

Active Noise Cancellation Using Aggressor-Aware Clamping Circuit for Robust On-Chip Communication.

Atul Katoch, Maurice Meijer, Sanjeev K. Jain

Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005

High speed current-mode signaling circuits for on-chip interconnects.

Atul Katoch, Harry J. M. Veendrick, Evert Seevinck

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Coding Techniques for Low Switching Noise in Fault Tolerant Busses.

André K. Nieuwland, Atul Katoch, Daniele Rossi, Cecilia Metra

Proceedings of the 11th IEEE International On-Line Testing Symposium (IOLTS 2005), 2005

Isodelay output driver design using step-wise charging for low power.

Atul Katoch, Harry J. M. Veendrick

Proceedings of the 31st European Solid-State Circuits Conference, 2005

2004

Reducing Cross-Talk Induced Power Consumption and Delay.

André K. Nieuwland, Atul Katoch, Maurice Meijer

Proceedings of the Integrated Circuit and System Design, 2004

Impact of ECCs on Simultaneously Switching Output Noise for On-Chip Busses of High Reliability Systems.

Daniele Rossi, A. Muccio, André K. Nieuwland, Atul Katoch, Cecilia Metra

Proceedings of the 10th IEEE International On-Line Testing Symposium (IOLTS 2004), 2004

Adaptive threshold scheme to operate long on-chip buses at the limit of signal integrity.

Atul Katoch, Manish Garg, Evert Seevinck, Harry J. M. Veendrick

Proceedings of the 33rd European Solid-State Circuits Conference, 2004

2003

Aggressor aware repeater circuits for improving on-chip bus performance and robustness.

Atul Katoch, Sanjeev K. Jain, Maurice Meijer

Proceedings of the ESSCIRC 2003, 2003