Chang-Feng Loi

According to our database, Chang-Feng Loi authored at least 3 papers between 2016 and 2019.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2019

A 400Gb/s Transceiver for PAM-4 Optical Direct-Detect Application in 16nm FinFET.

Chang-Feng Loi, A. Mellati, Amber Tan, A. Farhoodfar, Arun Tiruvur, Belal Helal, Bob Killips, Farshid Rafiee Rad, Jamal Riani, Jorge Pernillo, J. Sun, J. Wong, K. Abdelhalim, K. Gopalakrishnan, Kwang Young Kim, Lawrence Tse, M. Davoodi, Michael Q. Le, M. Zhang, M. Talegaonkar, P. Prabha, Ravindran Mohanavelu, S. Chong, Simon Forey, S. Netto, Sudeep Bhoja, W. Liew, Y. Duan, Y. Liao

Proceedings of the IEEE International Solid- State Circuits Conference, 2019

2017

A background calibrated 28GS/s 8b interleaved SAR ADC in 28nm CMOS.

Michael Q. Le, James Gorecki, Jamal Riani, Jorge Pernillo, A. Tan, K. Gopalakrishnan, Belal Helal, Pulkit Khandelwal, Chang-Feng Loi, Irene Quek, P. Wong, Aaron Buchwald

Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017

2016

3.4 A 40/50/100Gb/s PAM-4 Ethernet transceiver in 28nm CMOS.

Karthik Gopalakrishnan, Alan Ren, Amber Tan, Arash Farhood, Arun Tiruvur, Belal Helal, Chang-Feng Loi, Chris Jiang, Halil Cirit, Irene Quek, Jamal Riani, James Gorecki, Jennifer Wu, Jorge Pernillo, Lawrence Tse, Michael Q. Le, Mohammad Ranjbar, Pui-Shan Wong, Pulkit Khandelwal, Rajesh Narayanan, Ravindran Mohanavelu, Sameer Herlekar, Sudeep Bhoja, Vlad Shvydun

Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016