Chang Xue

Orcid: 0000-0003-1566-5809

According to our database1, Chang Xue authored at least 12 papers between 2022 and 2026.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
TAS-GNN: A Status-Aware Signed Graph Neural Network for Anomaly Detection in Bitcoin Trust Systems.
CoRR, March, 2026

RecMind: LLM-Enhanced Graph Neural Networks for Personalized Consumer Recommendations.
Proceedings of the IEEE International Conference on Consumer Electronics, 2026

2025
A Bit-Partitioned Floating-Point 6T SRAM Computing-in-Memory Macro Based on Dual-Edge Time-Domain Structure.
IEEE Trans. Circuits Syst. I Regul. Pap., December, 2025

A Current-Mode Multiply-Accumulate Macro in Sensing-Computing Fusion System for Feature Extraction and Redundancy Reduction.
IEEE Trans. Circuits Syst. II Express Briefs, May, 2025

Unifying Prediction and Explanation in Time-Series Transformers via Shapley-based Pretraining.
CoRR, January, 2025

A Segmented Precision Configurable Computing-in-Memory Macro With Dual-Edge Time-Domain Structure.
IEEE Solid State Circuits Lett., 2025

2024
A 768.7-2124.2 TOPS/W Time-Domain Computing-in-Memory Macro With Low Static Leakage and Precision-Configurable TDC.
IEEE Trans. Circuits Syst. II Express Briefs, May, 2024

An eDRAM-Based Computing-in-Memory Macro With Full-Valid-Storage and Channel-Wise-Parallelism for Depthwise Neural Network.
IEEE Trans. Circuits Syst. II Express Briefs, May, 2024

A Dual-Branch Autoencoder Network for Underwater Low-Light Polarized Image Enhancement.
Remote. Sens., April, 2024

Multi-view Fuzzy Graph Attention Networks for Enhanced Graph Learning.
CoRR, 2024

2022
Single-Mode CMOS 6T-SRAM Macros With Keeper-Loading-Free Peripherals and Row-Separate Dynamic Body Bias Achieving 2.53fW/bit Leakage for AIoT Sensing Platforms.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022

Reliability-Improved Read Circuit and Self-Terminating Write Circuit for STT-MRAM in 16 nm FinFET.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022


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