Changhee Jung

Orcid: 0000-0002-6422-6549

Affiliations:
  • Purdue University, West Lafayette, IN, USA


According to our database1, Changhee Jung authored at least 52 papers between 2005 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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Links

Online presence:

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Bibliography

2024
Real-Time Systems Optimization with Black-box Constraints and Hybrid Variables.
CoRR, 2024

A General and Scalable Method for Optimizing Real-Time Systems.
CoRR, 2024

2023
A Safety-Performance Metric Enabling Computational Awareness in Autonomous Robots.
IEEE Robotics Autom. Lett., September, 2023

Automatic Permission Check Analysis for Linux Kernel.
IEEE Trans. Dependable Secur. Comput., 2023

Optimizing Logical Execution Time Model for Both Determinism and Low Latency.
CoRR, 2023

DevFuzz: Automatic Device Model-Guided Device Driver Fuzzing.
Proceedings of the 44th IEEE Symposium on Security and Privacy, 2023

RTailor: Parameterizing Soft Error Resilience for Mixed-Criticality Real-Time Systems.
Proceedings of the IEEE Real-Time Systems Symposium, 2023

SweepCache: Intermittence-Aware Cache on the Cheap.
Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023

Persistent Processor Architecture.
Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023

Write-Light Cache for Energy Harvesting Systems.
Proceedings of the 50th Annual International Symposium on Computer Architecture, 2023

2022
CapOS: Capacitor Error Resilience for Energy Harvesting Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Lightweight Soft Error Resilience for In-Order Cores.
CoRR, 2022

Enabling Volatile Caches for Energy Harvesting Systems.
CoRR, 2022

Compiler-Directed High-Performance Intermittent Computation with Power Failure Immunity.
Proceedings of the 28th IEEE Real-Time and Embedded Technology and Applications Symposium, 2022

Featherweight Soft Error Resilience for GPUs.
Proceedings of the 55th IEEE/ACM International Symposium on Microarchitecture, 2022

Capri: Compiler and Architecture Support for Whole-System Persistence.
Proceedings of the HPDC '22: The 31st International Symposium on High-Performance Parallel and Distributed Computing, Minneapolis, MN, USA, 27 June 2022, 2022

2021
Towards Computational Awareness in Autonomous Robots: An Empirical Study of Computational Kernels.
CoRR, 2021

Turnpike: Lightweight Soft Error Resilience for In-Order Cores.
Proceedings of the MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, 2021

ReplayCache: Enabling Volatile Cachesfor Energy Harvesting Systems.
Proceedings of the MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, 2021

PMEM-spec: persistent memory speculation (strict persistency can trump relaxed persistency).
Proceedings of the ASPLOS '21: 26th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2021

2020
Compiler Directed Speculative Intermittent Computation.
CoRR, 2020

Compiler-directed soft error resilience for lightweight GPU register file protection.
Proceedings of the 41st ACM SIGPLAN International Conference on Programming Language Design and Implementation, 2020

Unbounded Hardware Transactional Memory for a Hybrid DRAM/NVM Memory System.
Proceedings of the 53rd Annual IEEE/ACM International Symposium on Microarchitecture, 2020

2019
PeX: A Permission Check Analysis Framework for Linux Kernel.
Proceedings of the 28th USENIX Security Symposium, 2019

Achieving Stagnation-Free Intermittent Computation with Boundary-Free Adaptive Execution.
Proceedings of the 25th IEEE Real-Time and Embedded Technology and Applications Symposium, 2019

CoSpec: Compiler Directed Speculative Intermittent Computation.
Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, 2019

Introduction to HIPS 2019.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium Workshops, 2019

BOGO: Buy Spatial Memory Safety, Get Temporal Memory Safety (Almost) Free.
Proceedings of the Twenty-Fourth International Conference on Architectural Support for Programming Languages and Operating Systems, 2019

2018
Sampler: PMU-Based Sampling to Detect Memory Errors Latent in Production Software.
Proceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture, 2018

iDO: Compiler-Directed Failure Atomicity for Nonvolatile Memory.
Proceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture, 2018

CommAnalyzer: automated estimation of communication cost and scalability on HPC clusters from sequential code.
Proceedings of the 27th International Symposium on High-Performance Parallel and Distributed Computing, 2018

nAdroid: statically detecting ordering violations in Android applications.
Proceedings of the 2018 International Symposium on Code Generation and Optimization, 2018

2017
BenchPrime: Effective Building of a Hybrid Benchmark Suite.
ACM Trans. Embed. Comput. Syst., 2017

Compiler-Directed Soft Error Detection and Recovery to Avoid DUE and SDC via Tail-DMR.
ACM Trans. Embed. Comput. Syst., 2017

AutoMatch: An automated framework for relative performance estimation and workload distribution on heterogeneous HPC systems.
Proceedings of the 2017 IEEE International Symposium on Workload Characterization, 2017

ProRace: Practical Data Race Detection for Production Use.
Proceedings of the Twenty-Second International Conference on Architectural Support for Programming Languages and Operating Systems, 2017

2016
Compiler-directed lightweight checkpointing for fine-grained guaranteed soft error recovery.
Proceedings of the International Conference for High Performance Computing, 2016

Lightweight hardware support for transparent consistency-aware checkpointing in intermittent energy-harvesting systems.
Proceedings of the 5th Non-Volatile Memory Systems and Applications Symposium, 2016

Low-cost soft error resilience with unified data verification and fine-grained recovery for acoustic sensor based detection.
Proceedings of the 49th Annual IEEE/ACM International Symposium on Microarchitecture, 2016

TxRace: Efficient Data Race Detection Using Commodity Hardware Transactional Memory.
Proceedings of the Twenty-First International Conference on Architectural Support for Programming Languages and Operating Systems, 2016

2015
Clover: Compiler Directed Lightweight Soft Error Resilience.
Proceedings of the 16th ACM SIGPLAN/SIGBED Conference on Languages, 2015

2014
Detecting memory leaks through introspective dynamic behavior modelling using machine learning.
Proceedings of the 36th International Conference on Software Engineering, 2014

Automated memory leak detection for production use.
Proceedings of the 36th International Conference on Software Engineering, 2014

2013
Effective techniques for understanding and improving data structure usage.
PhD thesis, 2013

2011
Brainy: effective selection of data structures.
Proceedings of the 32nd ACM SIGPLAN Conference on Programming Language Design and Implementation, 2011

2010
Adaptive execution techniques of parallel programs for multiprocessors.
J. Parallel Distributed Comput., 2010

2009
Prefetching with Helper Threads for Loosely Coupled Multiprocessor Systems.
IEEE Trans. Parallel Distributed Syst., 2009

DDT: design and evaluation of a dynamic program analysis for optimizing data structure usage.
Proceedings of the 42st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42 2009), 2009

2007
Experimental Analysis on Time-Triggered Power Consumption Measurement with DVS-Enabled Multiple Power Domain Platform.
Proceedings of the Software Technologies for Embedded and Ubiquitous Systems, 2007

Performance characterization of prelinking and preloadingfor embedded systems.
Proceedings of the 7th ACM & IEEE International conference on Embedded software, 2007

2006
Helper thread prefetching for loosely-coupled multiprocessor systems.
Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), 2006

2005
Adaptive execution techniques for SMT multiprocessor architectures.
Proceedings of the ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2005


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