Changlin Chen

Orcid: 0000-0002-1862-2807

According to our database1, Changlin Chen authored at least 19 papers between 2012 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
U<sup>2</sup>D<sup>2</sup>PCB: Uncertainty-Aware Unsupervised Defect Detection on PCB Images Using Reconstructive and Discriminative Models.
IEEE Trans. Instrum. Meas., 2024

2023
Few-shot ship classification based on metric learning.
Multim. Syst., October, 2023

Conversion of infrared ocean target images to visible images driven by energy information.
Multim. Syst., October, 2023

A storage-efficient SNN-CNN hybrid network with RRAM-implemented weights for traffic signs recognition.
Eng. Appl. Artif. Intell., 2023

A High-speed and Low-power FPGA Implementation of Spiking Convolutional Neural Network Using Logarithmic Quantization.
Proceedings of the 19th International Conference on Natural Computation, 2023

2022
Aircraft and Satellite Observations of Vortex Evolution and Surface Wind Asymmetry of Concentric Eyewalls in Hurricane Irma.
Remote. Sens., 2022

2021
Recovery of Tropical Cyclone Induced SST Cooling Observed by Satellite in the Northwestern Pacific Ocean.
Remote. Sens., 2021

2020
Internal Learning for Image Super-Resolution by Adaptive Feature Transform.
Symmetry, 2020

2018
FPGA-Based Multi-core Reconfigurable System for SAR Imaging.
Proceedings of the 2018 IEEE International Geoscience and Remote Sensing Symposium, 2018

Dimension reduction linear constrained minimum variance adaptive digital beamforming.
Proceedings of the 2nd International Conference on High Performance Compilation, 2018

2017
Towards Maximum Utilization of Remained Bandwidth in Defected NoC Links.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017

2015
Towards Dependable Network-on-Chip Architectures.
PhD thesis, 2015

Enabling vertical wormhole switching in 3D NoC-bus hybrid systems.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

2014
Link Bandwidth Aware Backtracking Based Dynamic Task Mapping in NoC based MPSoCs.
Proceedings of the 2014 International Workshop on Network on Chip Architectures, 2014

Towards an Effective Utilization of Partially Defected Interconnections in 2D Mesh NoCs.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2014

2013
A low cost method to tolerate soft errors in the NoC router control plane.
Proceedings of the 2013 IEEE International SOC Conference, Erlangen, Germany, 2013

An Effective Routing Algorithm to Avoid Unnecessary Link Abandon in 2D Mesh NoCs.
Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013

2012
Design of interlock-free combined allocators for Networks-on-Chip.
Proceedings of the IEEE 25th International SOC Conference, 2012

A Novel Flit Serialization Strategy to Utilize Partially Faulty Links in Networks-on-Chip.
Proceedings of the 2012 Sixth IEEE/ACM International Symposium on Networks-on-Chip (NoCS), 2012


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