Cheng Chu

According to our database, Cheng Chu authored at least 15 papers between 2020 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

QuantumLeak: Stealing Quantum Neural Networks from Cloud-based NISQ Machines.

Zhenxiao Fu, Min Yang, Cheng Chu, Yilun Xu, Gang Huang, Fan Chen

CoRR, 2024

TITAN: A Distributed Large-Scale Trapped-Ion NISQ Computer.

Cheng Chu, Zhenxiao Fu, Yilun Xu, Gang Huang, Hausi A. Müller, Fan Chen, Lei Jiang

CoRR, 2024

2023

Accelerating Deformable Convolution Networks with Dynamic and Irregular Memory Accesses.

Cheng Chu, Cheng Liu, Dawen Xu, Ying Wang, Tao Luo, Huawei Li, Xiaowei Li

ACM Trans. Design Autom. Electr. Syst., July, 2023

CryptoQFL: Quantum Federated Learning on Encrypted Data.

Cheng Chu, Lei Jiang, Fan Chen

Proceedings of the IEEE International Conference on Quantum Computing and Engineering, 2023

QDoor: Exploiting Approximate Synthesis for Backdoor Attacks in Quantum Neural Networks.

Cheng Chu, Fan Chen, Philip Richerme, Lei Jiang

Proceedings of the IEEE International Conference on Quantum Computing and Engineering, 2023

IQGAN: Robust Quantum Generative Adversarial Network for Image Synthesis On NISQ Devices.

Cheng Chu, Grant Skipper, Martin Swany, Fan Chen

Proceedings of the IEEE International Conference on Acoustics, 2023

QTROJAN: A Circuit Backdoor Against Quantum Neural Networks.

Cheng Chu, Lei Jiang, Martin Swany, Fan Chen

Proceedings of the IEEE International Conference on Acoustics, 2023

2022

HyCA: A Hybrid Computing Architecture for Fault-Tolerant Deep Learning.

Cheng Liu, Cheng Chu, Dawen Xu, Ying Wang, Qianlong Wang, Huawei Li, Xiaowei Li, Kwang-Ting Cheng

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

QMLP: An Error-Tolerant Nonlinear Quantum MLP Architecture using Parameterized Two-Qubit Gates.

Cheng Chu, Nai-Hui Chia, Lei Jiang, Fan Chen

Proceedings of the ISLPED '22: ACM/IEEE International Symposium on Low Power Electronics and Design, Boston, MA, USA, August 1, 2022

Canopy: A CNFET-based Process Variation Aware Systolic DNN Accelerator.

Cheng Chu, Dawen Xu, Ying Wang, Fan Chen

Proceedings of the ISLPED '22: ACM/IEEE International Symposium on Low Power Electronics and Design, Boston, MA, USA, August 1, 2022

MOCCA: A Process Variation Tolerant Systolic DNN Accelerator using CNFETs in Monolithic 3D.

Samuel J. Engers, Cheng Chu, Dawen Xu, Ying Wang, Fan Chen

Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022

2021

Energy-Efficient Accelerator Design for Deformable Convolution Networks.

Dawen Xu, Cheng Chu, Cheng Liu, Ying Wang, Huawei Li, Xiaowei Li, Kwang-Ting Cheng

CoRR, 2021

RECOIN: A Low-Power Processing-in-ReRAM Architecture for Deformable Convolution.

Cheng Chu, Fan Chen, Dawen Xu, Ying Wang

Proceedings of the GLSVLSI '21: Great Lakes Symposium on VLSI 2021, 2021

2020

A Hybrid Computing Architecture for Fault-tolerant Deep Learning Accelerators.

Dawen Xu, Cheng Chu, Qianlong Wang, Cheng Liu, Ying Wang, Lei Zhang, Huaguo Liang, Kwang-Ting Cheng

Proceedings of the 38th IEEE International Conference on Computer Design, 2020

Multi-task Scheduling for PIM-based Heterogeneous Computing System.

Dawen Xu, Cheng Chu, Cheng Liu, Ying Wang, Xianzhong Zhou, Lei Zhang, Huaguo Liang, Huawei Li

Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020