Tao Luo
Orcid: 0000-0002-3415-3676Affiliations:
- Nanyang Technological University, Institute of High Performance Computing, Singapore
According to our database1,
Tao Luo
authored at least 47 papers
between 2015 and 2024.
Collaborative distances:
Collaborative distances:
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Bibliography
2024
IEEE Trans. Neural Networks Learn. Syst., March, 2024
IEEE Trans. Neural Networks Learn. Syst., February, 2024
IEEE Trans. Neural Networks Learn. Syst., January, 2024
Table-Lookup MAC: Scalable Processing of Quantised Neural Networks in FPGA Soft Logic.
Proceedings of the 2024 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2024
2023
IEEE Trans. Very Large Scale Integr. Syst., December, 2023
Desire backpropagation: A lightweight training algorithm for multi-layer spiking neural networks based on spike-timing-dependent plasticity.
Neurocomputing, December, 2023
IEEE Trans. Very Large Scale Integr. Syst., November, 2023
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., November, 2023
IEEE Trans. Parallel Distributed Syst., October, 2023
IEEE Trans. Computers, October, 2023
Accelerating Deformable Convolution Networks with Dynamic and Irregular Memory Accesses.
ACM Trans. Design Autom. Electr. Syst., July, 2023
Commun. ACM, July, 2023
IEEE Trans. Computers, June, 2023
Array, March, 2023
CoRR, 2023
CoRR, 2023
CoRR, 2023
MA-BERT: Towards Matrix Arithmetic-only BERT Inference by Eliminating Complex Non-Linear Functions.
Proceedings of the Eleventh International Conference on Learning Representations, 2023
2022
E3NE: An End-to-End Framework for Accelerating Spiking Neural Networks With Emerging Neural Encoding on FPGAs.
IEEE Trans. Parallel Distributed Syst., 2022
NC-Net: Efficient Neuromorphic Computing Using Aggregated Subnets on a Crossbar-Based Architecture With Nonvolatile Memory.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
Hardware-software co-exploration with racetrack memory based in-memory computing for CNN inference in embedded systems.
J. Syst. Archit., 2022
APT: The master-copy-free training method for quantised neural network on edge devices.
J. Parallel Distributed Comput., 2022
Corrigendum to "Coreset: Hierarchical neuromorphic computing supporting large-scale neural networks with improved resource efficiency" [Neurocomputing (2022) 128-140].
Neurocomputing, 2022
Coreset: Hierarchical neuromorphic computing supporting large-scale neural networks with improved resource efficiency.
Neurocomputing, 2022
Proceedings of the 42nd IEEE International Conference on Distributed Computing Systems, 2022
A Resource-efficient Spiking Neural Network Accelerator Supporting Emerging Neural Encoding.
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022
2021
DTNN: Energy-efficient Inference with Dendrite Tree Inspired Neural Networks for Edge Vision Applications.
CoRR, 2021
IEEE Comput. Intell. Mag., 2021
Proceedings of the 41st IEEE International Conference on Distributed Computing Systems Workshops, 2021
DeepFire: Acceleration of Convolutional Spiking Neural Network on Modern Field Programmable Gate Arrays.
Proceedings of the 31st International Conference on Field-Programmable Logic and Applications, 2021
2020
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
Proceedings of the International Conference on Neuromorphic Systems, 2020
Proceedings of the 40th IEEE International Conference on Distributed Computing Systems, 2020
Proceedings of the 40th IEEE International Conference on Distributed Computing Systems, 2020
0.5V 4.8 pJ/SOP 0.93µW Leakage/core Neuromorphic Processor with Asynchronous NoC and Reconfigurable LIF Neuron.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2020
2019
ACM Trans. Archit. Code Optim., 2019
2018
2017
IEEE Trans. Circuits Syst. II Express Briefs, 2017
A novel two-stage modular multiplier based on racetrack memory for asymmetric cryptography.
Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017
2016
Cost-efficient Acceleration of Hardware Trojan Detection Through Fan-Out Cone Analysis and Weighted Random Pattern Technique.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016
2015
Proceedings of the IEEE 9th International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2015