Cheng-Wu Lin

According to our database, Cheng-Wu Lin authored at least 12 papers between 2007 and 2020.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2020

Optimizing the Sensor Placement for Foot Plantar Center of Pressure without Prior Knowledge Using Deep Reinforcement Learning.

Cheng-Wu Lin, Shanq-Jang Ruan, Wei-Chun Hsu, Ya-Wen Tu, Shao-Li Han

Sensors, 2020

2015

A capacitance-ratio quantification design for linearity test in differential top-plate sampling sar ADCS.

An-Sheng Chao, Cheng-Wu Lin, Hsin-Wen Ting, Soon-Jyh Chang

Int. J. Circuit Theory Appl., 2015

2014

A Low-Cost Stimulus Design for Linearity Test in SAR ADCs.

An-Sheng Chao, Cheng-Wu Lin, Hsin-Wen Ting, Soon-Jyh Chang

IEICE Trans. Electron., 2014

2013

Effective and Efficient Approach for Power Reduction by Using Multi-Bit Flip-Flops.

Ya-Ting Shyu, Jai-Ming Lin, Chun-Po Huang, Cheng-Wu Lin, Ying-Zu Lin, Soon-Jyh Chang

IEEE Trans. Very Large Scale Integr. Syst., 2013

2012

Mismatch-Aware Common-Centroid Placement for Arbitrary-Ratio Capacitor Arrays Considering Dummy Capacitors.

Cheng-Wu Lin, Jai-Ming Lin, Yen-Chih Chiu, Chun-Po Huang, Soon-Jyh Chang

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012

Routability-driven placement algorithm for analog integrated circuits.

Cheng-Wu Lin, Cheng-Chung Lu, Jai-Ming Lin, Soon-Jyh Chang

Proceedings of the International Symposium on Physical Design, 2012

A power-efficient sizing methodology of SAR ADCs.

Chun-Po Huang, Soon-Jyh Chang, Guan-Ying Huang, Cheng-Wu Lin

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

Analytical-based approach for capacitor placement with gradient error compensation and device correlation enhancement in analog integrated circuits.

Cheng-Wu Lin, Chung-Lin Lee, Jai-Ming Lin, Soon-Jyh Chang

Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design, 2012

2011

Common-centroid capacitor placement considering systematic and random mismatches in analog integrated circuits.

Cheng-Wu Lin, Jai-Ming Lin, Yen-Chih Chiu, Chun-Po Huang, Soon-Jyh Chang

Proceedings of the 48th Design Automation Conference, 2011

2010

A 5-bit 3.2-GS/s Flash ADC With a Digital Offset Calibration Scheme.

Ying-Zu Lin, Cheng-Wu Lin, Soon-Jyh Chang

IEEE Trans. Very Large Scale Integr. Syst., 2010

Performance-driven analog placement considering boundary constraint.

Cheng-Wu Lin, Jai-Ming Lin, Chun-Po Huang, Soon-Jyh Chang

Proceedings of the 47th Design Automation Conference, 2010

2007

Oscillator-Based Reconfigurable Sinusoidal Signal Generator for ADC BIST.

Hsin-Wen Ting, Cheng-Wu Lin, Bin-Da Liu, Soon-Jyh Chang

J. Electron. Test., 2007