Cheng-Yuan Michael Wang

According to our database1, Cheng-Yuan Michael Wang authored at least 8 papers between 2012 and 2017.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2017
A Hybrid DRAM/PCM Buffer Cache Architecture for Smartphones with QoS Consideration.
ACM Trans. Design Autom. Electr. Syst., 2017

2016
Improving PCM Endurance with a Constant-Cost Wear Leveling Design.
ACM Trans. Design Autom. Electr. Syst., 2016

2015
SECRET: A Selective Error Correction Framework for Refresh Energy Reduction in DRAMs.
ACM Trans. Archit. Code Optim., 2015

A buffer cache architecture for smartphones with hybrid DRAM/PCM memory.
Proceedings of the IEEE Non-Volatile Memory System and Applications Symposium, 2015

2014
NVM duet: unified working memory and persistent store architecture.
Proceedings of the Architectural Support for Programming Languages and Operating Systems, 2014

2013
A 45nm 6b/cell charge-trapping flash memory using LDPC-based ECC and drift-immune soft-sensing engine.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

2012
SECRET: Selective error correction for refresh energy reduction in DRAMs.
Proceedings of the 30th International IEEE Conference on Computer Design, 2012

Age-based PCM wear leveling with nearly zero search cost.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012


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