Chenhao Xie

Orcid: 0000-0002-1399-0352

Affiliations:
  • Pacific Northwest National Lab (PNNL), Richland, USA
  • University of Houston, TX, USA (former)


According to our database1, Chenhao Xie authored at least 28 papers between 2017 and 2025.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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Online presence:

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Bibliography

2025
DynMap: A Heuristic Dynamic Mapper for CGRA Multitask Dynamic Resource Allocation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., August, 2025

AR-Light: Enabling Fast and Lightweight Multi-User Augmented Reality via Semantic Segmentation and Collaborative View Synchronization.
IEEE Trans. Computers, June, 2025

Deep Learning Operators Performance Tuning for Changeable Sized Input Data on Tensor Accelerate Hardware.
IEEE Trans. Computers, June, 2025

MoF-Image: Generating Mixture-of-Features Video Game Image Dataset via GPU Rendering Simulation.
Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition Workshops, 2025

Achieving Lightweight Super-Resolution for Real-Time Computer Graphics.
Proceedings of the AAAI-25, Sponsored by the Association for the Advancement of Artificial Intelligence, February 25, 2025

2024
Efficient Radius Search for Adaptive Foveal Sizing Mechanism in Collaborative Foveated Rendering Framework.
IEEE Trans. Mob. Comput., May, 2024

2023
Post0-VR: Enabling Universal Realistic Rendering for Modern VR via Exploiting Architectural Similarity and Data Sharing.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2023

2022
MSREP: A Fast yet Light Sparse Matrix Framework for Multi-GPU Systems.
CoRR, 2022

DRIPS: Dynamic Rebalancing of Pipelined Streaming Applications on CGRAs.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2022

MemGaze: Rapid and Effective Load-Level Memory Trace Analysis.
Proceedings of the IEEE International Conference on Cluster Computing, 2022

2021
ARENA: Asynchronous Reconfigurable Accelerator Ring to Enable Data-Centric Parallel Computing.
IEEE Trans. Parallel Distributed Syst., 2021

Enabling Highly Efficient Capsule Networks Processing Through Software-Hardware Co-Design.
IEEE Trans. Computers, 2021

I-GCN: A Graph Convolutional Network Accelerator with Runtime Locality Enhancement through Islandization.
Proceedings of the MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, 2021

Fast and Scalable Sparse Triangular Solver for Multi-GPU Based HPC Architectures.
Proceedings of the ICPP 2021: 50th International Conference on Parallel Processing, Lemont, IL, USA, August 9, 2021

DynPaC: Coarse-Grained, Dynamic, and Partially Reconfigurable Array for Streaming Applications.
Proceedings of the 39th IEEE International Conference on Computer Design, 2021

A Survey: Handling Irregularities in Neural Network Acceleration with FPGAs.
Proceedings of the 2021 IEEE High Performance Extreme Computing Conference, 2021

AURORA: Automated Refinement of Coarse-Grained Reconfigurable Accelerators.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

Q-VR: system-level design for future mobile collaborative virtual reality.
Proceedings of the ASPLOS '21: 26th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2021

OpenCGRA: Democratizing Coarse-Grained Reconfigurable Arrays.
Proceedings of the 32nd IEEE International Conference on Application-specific Systems, 2021

2020
ARENA: Asynchronous Reconfigurable Accelerator Ring to Enable Data-Centric Parallel Computing.
CoRR, 2020

OpenCGRA: An Open-Source Unified Framework for Modeling, Testing, and Evaluating CGRAs.
Proceedings of the 38th IEEE International Conference on Computer Design, 2020

Enabling Highly Efficient Capsule Networks Processing Through A PIM-Based Architecture Design.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2020

2019
OO-VR: NUMA friendly object-oriented VR rendering framework for future NUMA-based multi-GPU systems.
Proceedings of the 46th International Symposium on Computer Architecture, 2019

PIM-VR: Erasing Motion Anomalies In Highly-Interactive Virtual Reality World with Customized Memory Cube.
Proceedings of the 25th IEEE International Symposium on High Performance Computer Architecture, 2019

2018
Towards Memory Friendly Long-Short Term Memory Networks (LSTMs) on Mobile GPUs.
Proceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture, 2018

Perception-Oriented 3D Rendering Approximation for Modern Graphics Processors.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2018

2017
Emerging technology enabled energy-efficient GPGPUs register file.
Microprocess. Microsystems, 2017

Processing-in-Memory Enabled Graphics Processors for 3D Rendering.
Proceedings of the 2017 IEEE International Symposium on High Performance Computer Architecture, 2017


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