Chetana N. Keltcher

According to our database, Chetana N. Keltcher authored at least 12 papers between 1993 and 2003.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2003

The AMD Opteron Processor for Multiprocessor Servers.

Chetana N. Keltcher, Kevin J. McGrath, Ardsher Ahmed, Pat Conway

IEEE Micro, 2003

1996

An optimal time multiplication free algorithm for edge detection on a mesh.

Manjit Borah, Chetana Nagendra, Mohan Vishwanath, Robert Michael Owens, Mary Jane Irwin

J. VLSI Signal Process., 1996

Design tradeoffs in high speed multipliers and FIR filters.

Chetana Nagendra, Robert Michael Owens, Mary Jane Irwin

Proceedings of the 9th International Conference on VLSI Design (VLSI Design 1996), 1996

Design tradeoffs in CMOS FIR filters.

Chetana Nagendra, Mary Jane Irwin

Proceedings of the 1996 IEEE International Conference on Acoustics, 1996

1995

Digit pipelined arithmetic on fine-grain array processors.

Chetana Nagendra, Robert Michael Owens, Mary Jane Irwin

J. VLSI Signal Process., 1995

Unifying carry-sum and signed-digital number representations for low power.

Chetana Nagendra, Robert Michael Owens, Mary Jane Irwin

Proceedings of the 1995 International Symposium on Low Power Design 1995, 1995

1994

Power-delay characteristics of CMOS adders.

Chetana Nagendra, Robert Michael Owens, Mary Jane Irwin

IEEE Trans. Very Large Scale Integr. Syst., 1994

Digit pipelined discrete wavelet transform.

Chetana Nagendra, Mary Jane Irwin, Robert Michael Owens

Proceedings of ICASSP '94: IEEE International Conference on Acoustics, 1994

The MGAP: A High Performance, User Programmable, Multifunctional Architecture for DS.

Manjit Borah, Chetana Nagendra, Robert Michael Owens, Mary Jane Irwin

Proceedings of the 27th Annual Hawaii International Conference on System Sciences (HICSS-27), 1994

Rapid prototyping with programmable control paths.

Raminder Singh Bajwa, Chetana N. Keltcher, Paul Keltcher, Mary Jane Irwin

Proceedings of the International Conference on Application Specific Array Processors, 1994

1993

Edge detection using fine-grained parallelism in VLSI.

Chetana Nagendra, Manjit Borah, Mohan Vishwanath, Robert Michael Owens, Mary Jane Irwin

Proceedings of the IEEE International Conference on Acoustics, 1993

Digit systolic algorithms for fine-grain architectures.

Chetana Nagendra, Robert Michael Owens, Mary Jane Irwin

Proceedings of the International Conference on Application-Specific Array Processors, 1993