Manjit Borah

According to our database, Manjit Borah authored at least 18 papers between 1992 and 2007.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2007

Two-Stage Newton-Raphson Method for Transistor-Level Simulation.

Zhengyong Zhu, He Peng, Chung-Kuan Cheng, Khosro Rouz, Manjit Borah, Ernest S. Kuh

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

2005

Efficient transient simulation for transistor-level analysis.

Zhengyong Zhu, Khosro Rouz, Manjit Borah, Chung-Kuan Cheng, Ernest S. Kuh

Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

1999

A Fast and Simple Steiner Routing Heuristic.

Manjit Borah, Robert Michael Owens, Mary Jane Irwin

Discret. Appl. Math., 1999

1998

An Improved Cost Heuristic for Transistor Sizing.

Cyrus Bamji, Manjit Borah

Proceedings of the 11th International Conference on VLSI Design (VLSI Design 1991), 1998

1997

A fast algorithm for minimizing the Elmore delay to identified critical sinks.

Manjit Borah, Robert Michael Owens, Mary Jane Irwin

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997

1996

An optimal time multiplication free algorithm for edge detection on a mesh.

Manjit Borah, Chetana Nagendra, Mohan Vishwanath, Robert Michael Owens, Mary Jane Irwin

J. VLSI Signal Process., 1996

Transistor sizing for low power CMOS circuits.

Manjit Borah, Robert Michael Owens, Mary Jane Irwin

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996

Recent Developments in Performance Driven Steiner Routing: An Overview.

Manjit Borah, Robert Michael Owens, Mary Jane Irwin

Proceedings of the 6th Great Lakes Symposium on VLSI (GLS-VLSI '96), 1996

1995

Minimizing power consumption of static CMOS circuits by transistor sizing and input reordering.

Manjit Borah, Mary Jane Irwin, Robert Michael Owens

Proceedings of the 8th International Conference on VLSI Design (VLSI Design 1995), 1995

Transistor sizing for minimizing power consumption of CMOS circuits under delay constraint.

Manjit Borah, Robert Michael Owens, Mary Jane Irwin

Proceedings of the 1995 International Symposium on Low Power Design 1995, 1995

High-throughput and low-power DSP using clocked-CMOS circuitry.

Manjit Borah, Robert Michael Owens, Mary Jane Irwin

Proceedings of the 1995 International Symposium on Low Power Design 1995, 1995

Fast algorithm for performance-oriented Steiner routing.

Manjit Borah, Robert Michael Owens, Mary Jane Irwin

Proceedings of the 5th Great Lakes Symposium on VLSI (GLS-VLSI '95), 1995

Accurate Estimation of Combinational Circuit Activity.

Huzefa Mehta, Manjit Borah, Robert Michael Owens, Mary Jane Irwin

Proceedings of the 32st Conference on Design Automation, 1995

1994

An edge-based heuristic for Steiner routing.

Manjit Borah, Robert Michael Owens, Mary Jane Irwin

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1994

The MGAP: A High Performance, User Programmable, Multifunctional Architecture for DS.

Manjit Borah, Chetana Nagendra, Robert Michael Owens, Mary Jane Irwin

Proceedings of the 27th Annual Hawaii International Conference on System Sciences (HICSS-27), 1994

A SIMD solution to the sequence comparison problem on the MGAP.

Manjit Borah, Raminder Singh Bajwa, Sridhar Hannenhalli, Mary Jane Irwin

Proceedings of the International Conference on Application Specific Array Processors, 1994

1993

Edge detection using fine-grained parallelism in VLSI.

Chetana Nagendra, Manjit Borah, Mohan Vishwanath, Robert Michael Owens, Mary Jane Irwin

Proceedings of the IEEE International Conference on Acoustics, 1993

1992

Integrity and Security Issues in Multisignature Document Mailing Systems.

Gautam Barua, Manjit Borah

Proceedings of the Computer Networks, 1992