Chih-Cheng Hsiao

According to our database, Chih-Cheng Hsiao authored at least 3 papers between 2022 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2025

Miniaturized and Cost-Effective Programmable 2.5D/3.5D Platforms Enabled by Scalable Embedded Active Bridge Chipset.

Wei Lu, Jie Zhang, Yi-Hui Wei, Hsu-Ming Hsiao, Sih-Han Li, Chao-Kai Hsu, Chih-Cheng Hsiao, Feng-Hsiang Lo, Shyh-Shyuan Sheu, Chin-Hung Wang, Ching-Iang Li, Yung-Sheng Chang, Ming-Ji Dai, Wei-Chung Lo, Shih-Chieh Chang, Hung-Ming Chen, Kuan-Neng Chen, Po-Tsang Huang

IEEE J. Emerg. Sel. Topics Circuits Syst., September, 2025

2024

Scalable Embedded Multi-Die Active Bridge (S-EMAB) Chips with Integrated LDOs for Low-Cost Programmable 2.5D/3.5D Packaging Technology.

Wei Lu, Jie Zhang, Yi-Hui Wei, Hsu-Ming Hsiao, Sih-Han Li, Chao-Kai Hsu, Chih-Cheng Hsiao, Feng-Hsiang Lo, Shyh-Shyuan Sheu, Chin-Hung Wang, Wei-Chung Lo, Shih-Chieh Chang, Hung-Ming Chen, Kuan-Neng Chen, Po-Tsang Huang

Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

2022

Low-ESL (<1 pH @ 8.5 GHz) Multi-Terminal Si Capacitor Embedded in 3D Functional Interposer for Power Delivery Network.

Kyosuke Kobinata, Tatsuya Funaki, Yoshiaki Satake, Hitoshi Matsuno, Seiji Hidaka, Shunsuke Abe, Hiroyuki Ito, Chih-Cheng Hsiao, Sheng Yi Li, Young-Suk Kim, Takayuki Ohba

Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022