According to our database1, Chintan Desai authored at least 3 papers between 2004 and 2011.
Legend:Book In proceedings Article PhD thesis Other
A 1.0625 ~ 14.025 Gb/s Multi-Media Transceiver With Full-Rate Source-Series-Terminated Transmit Driver and Floating-Tap Decision-Feedback Equalizer in 40 nm CMOS.
IEEE J. Solid State Circuits, 2011
A 1.0625-to-14.025Gb/s multimedia transceiver with full-rate source-series-terminated transmit driver and floating-tap decision-feedback equalizer in 40nm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011
A 4.8-6.4 Gbps serial link for back-plane applications using decision feedback equalization.
Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004