Eric Zhang
This page is a disambiguation page, it actually contains mutiple papers from persons of the same or a similar name.
Bibliography
2023
Innovation Practices Track: Testability and Dependability of AI Hardware and Autonomous Systems.
Proceedings of the 41st IEEE VLSI Test Symposium, 2023
2021
PAGER-CoV: a comprehensive collection of pathways, annotated gene-lists and gene signatures for coronavirus disease studies.
Nucleic Acids Res., 2021
Proceedings of the 42nd IEEE Symposium on Security and Privacy, 2021
2019
Quant. Biol., 2019
2018
2014
A 28 Gb/s 560 mW Multi-Standard SerDes With Single-Stage Analog Front-End and 14-Tap Decision Feedback Equalizer in 28 nm CMOS.
IEEE J. Solid State Circuits, 2014
2.1 28Gb/s 560mW multi-standard SerDes with single-stage analog front-end and 14-tap decision-feedback equalizer in 28nm CMOS.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014
2013
A 0.9 V low-power reconfigurable successive approximation ADC for integrated sensors.
Proceedings of the IEEE 11th International New Circuits and Systems Conference, 2013
2011
A 1.0625 ~ 14.025 Gb/s Multi-Media Transceiver With Full-Rate Source-Series-Terminated Transmit Driver and Floating-Tap Decision-Feedback Equalizer in 40 nm CMOS.
IEEE J. Solid State Circuits, 2011
A 1.0625-to-14.025Gb/s multimedia transceiver with full-rate source-series-terminated transmit driver and floating-tap decision-feedback equalizer in 40nm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011
2005
A 4.8-6.4-Gb/s serial link for backplane applications using decision feedback equalization.
IEEE J. Solid State Circuits, 2005