Charlie Zhong

According to our database1, Charlie Zhong authored at least 6 papers between 2010 and 2014.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2014
A 15-22 Gbps Serial Link in 28 nm CMOS With Direct DFE.
IEEE J. Solid State Circuits, 2014

26.1 A 130mW 20Gb/s half-duplex serial link in 28nm CMOS.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

2012
A Single-Channel, 1.25-GS/s, 6-bit, 6.08-mW Asynchronous Successive-Approximation ADC With Improved Feedback Delay in 40-nm CMOS.
IEEE J. Solid State Circuits, 2012

2011
A 1.0625 ~ 14.025 Gb/s Multi-Media Transceiver With Full-Rate Source-Series-Terminated Transmit Driver and Floating-Tap Decision-Feedback Equalizer in 40 nm CMOS.
IEEE J. Solid State Circuits, 2011

A 1.0625-to-14.025Gb/s multimedia transceiver with full-rate source-series-terminated transmit driver and floating-tap decision-feedback equalizer in 40nm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2010
Single-channel, 1.25-GS/s, 6-bit, loop-unrolled asynchronous SAR-ADC in 40nm-CMOS.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010


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