Vishnu Balan

According to our database, Vishnu Balan authored at least 11 papers between 1999 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

NVLink-C2C: A Coherent Off Package Chip-to-Chip Interconnect with 40Gbps/pin Single-ended Signaling.

Ying Wei, Yi Chieh Huang, Haiming Tang, Nithya Sankaran, Ish Chadha, Dai Dai, Olakanmi Oluwole, Vishnu Balan, Edward Lee

Proceedings of the IEEE International Solid- State Circuits Conference, 2023

2021

3.2 The A100 Datacenter GPU and Ampere Architecture.

Jack Choquette, Ming-Ju Edward Lee, Ronny Krashinsky, Vishnu Balan, Brucek Khailany

Proceedings of the IEEE International Solid-State Circuits Conference, 2021

2014

A 15-22 Gbps Serial Link in 28 nm CMOS With Direct DFE.

Vishnu Balan, Olakanmi Oluwole, Gregory Kodani, Charlie Zhong, Ratnakar Dadi, Arif Amin, Ahmed Ragab, Ming-Ju Edward Lee

IEEE J. Solid State Circuits, 2014

26.1 A 130mW 20Gb/s half-duplex serial link in 28nm CMOS.

Vishnu Balan, Olakanmi Oluwole, Gregory Kodani, Charlie Zhong, Sanjeev Maheswari, Ratnakar Dadi, Arif Amin, Gautam Bhatia, Peter Mills, Ahmed Ragab, Ming-Ju Edward Lee

Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

2008

A 10Gb/s IEEE 802.3an-Compliant Ethernet Transceiver for 100m UTP Cable in 0.13μm CMOS.

Sandeep Gupta, José Tellado, Sridhar Begur, Frank Yang, Vishnu Balan, Michael A. Inerfield, Dariush Dabiri, John Dring, Sachin Goel, Kumaraguru Muthukumaraswamy, Frank McCarthy, Glenn Golden, Jiangfeng Wu, Susan Arno, Sanjay Kasturia

Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

2005

A 4.8-6.4-Gb/s serial link for backplane applications using decision feedback equalization.

Vishnu Balan, Joe Caroselli, Jenn-Gang Chern, Catherine Chow, Ratnakar Dadi, Chintan Desai, Leo Fang, David Hsu, Pankaj Joshi, Hiroshi Kimura, Cathy Ye Liu, Tzu-Wang Pan, Ryan Park, Cindy You, Yi Zeng, Eric Zhang, Freeman Zhong

IEEE J. Solid State Circuits, 2005

2004

A 4.8-6.4 Gbps serial link for back-plane applications using decision feedback equalization.

Vishnu Balan, Joe Caroselli, Jenn-Gang Chern, Chintan Desai, Cathy Liu

Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004

2003

A low-voltage regulator circuit with self-bias to improve accuracy.

Vishnu Balan

IEEE J. Solid State Circuits, 2003

2002

A crystal oscillator with automatic amplitude control and digitally controlled pulling range of +-100 ppm.

Vishnu Balan, Tzuwang Pan

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

1999

A 3-V, 10-100-MHz continuous-time seventh-order 0.05° equiripple linear phase filter.

Narendra Rao, Vishnu Balan, R. Contreras

IEEE J. Solid State Circuits, 1999

A 150 MHz continuous-time seventh order 0.05° equiripple linear phase filter.

Narendra Rao, Vishnu Balan, Richard Contreras, Jenn-Gang Chern, Y. Wang

Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999