Shaolei Quan

According to our database, Shaolei Quan authored at least 9 papers between 2004 and 2011.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of three.

2011

A 1.0625 ~ 14.025 Gb/s Multi-Media Transceiver With Full-Rate Source-Series-Terminated Transmit Driver and Floating-Tap Decision-Feedback Equalizer in 40 nm CMOS.

Freeman Zhong, Shaolei Quan, Wing Liu, Pervez M. Aziz, Tai Jing, Jen Dong, Chintan Desai, Hairong Gao, Monica Garcia, Gary Hom, Tony Huynh, Hiroshi Kimura, Ruchi Kothari, Lijun Li, Cathy Liu, Scott Lowrie, Kathy Ling, Amaresh V. Malipatil, Ram Narayan, Tom Prokop, Chaitanya Palusa, Anil Rajashekara, Ashutosh Sinha, Charlie Zhong, Eric Zhang

IEEE J. Solid State Circuits, 2011

A 1.0625-to-14.025Gb/s multimedia transceiver with full-rate source-series-terminated transmit driver and floating-tap decision-feedback equalizer in 40nm CMOS.

Shaolei Quan, Freeman Zhong, Wing Liu, Pervez M. Aziz, Tai Jing, Jen Dong, Chintan Desai, Hairong Gao, Monica Garcia, Gary Hom, Tony Huynh, Hiroshi Kimura, Ruchi Kothari, Lijun Li, Cathy Liu, Scott Lowrie, Kathy Ling, Amaresh V. Malipatil, Ram Narayan, Tom Prokop, Chaitanya Palusa, Anil Rajashekara, Ashutosh Sinha, Charlie Zhong, Eric Zhang

Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2006

Design of Reliable CMOS Phase-Locked Loops.

Chin-Long Wey, Chi-Shu Huang, Shaolei Quan

Proceedings of the 13th IEEE International Conference on Electronics, 2006

2005

Reliability enhancement of CMOS SRAMs.

Chin-Long Wey, Meng-Yao Liu, Shaolei Quan

Proceedings of the 13th IEEE International Workshop on Memory Technology, 2005

A novel reconfigurable architecture of low-power unsigned multiplier for digital signal processing.

Shaolei Quan, Qiang Qiang, Chin-Long Wey

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Design of a CMOS Operational Amplifier Amenable to Extreme Voltage Stress.

Shaolei Quan, Meng-Yao Liu, Chin-Long Wey

Proceedings of the 20th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2005), 2005

Design of a CMOS Operational Amplifier for Extreme-Voltage Stress Test.

Shaolei Quan, Qiang Qiang, Chin-Long Wey

Proceedings of the 14th Asian Test Symposium (ATS 2005), 2005

2004

A power-optimized 64-bit priority encoder utilizing parallel priority look-ahead.

Cheong Kun, Shaolei Quan, Andrew Mason

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

A noise optimization technique for codesign of CMOS radio-frequency low noise amplifiers and low-quality spiral inductors.

Shaolei Quan, Chin-Long Wey

Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, 2004