Christopher T. Weaver

According to our database1, Christopher T. Weaver authored at least 13 papers between 2000 and 2011.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2011
Harmonia: a transparent, efficient, and harmonious dynamic binary translator targeting the Intel® architecture.
Proceedings of the 8th Conference on Computing Frontiers, 2011

2009
Intel® atom<sup>TM</sup> processor core made FPGA-synthesizable.
Proceedings of the ACM/SIGDA 17th International Symposium on Field Programmable Gate Arrays, 2009

2004
Reducing the Soft-Error Rate of a High-Performance Microprocessor.
IEEE Micro, 2004

Techniques to Reduce the Soft Error Rate of a High-Performance Microprocessor.
Proceedings of the 31st International Symposium on Computer Architecture (ISCA 2004), 2004

2003
Measuring Architectural Vulnerability Factors.
IEEE Micro, 2003

A Systematic Methodology to Compute the Architectural Vulnerability Factors for a High-Performance Microprocessor.
Proceedings of the 36th Annual International Symposium on Microarchitecture, 2003

2002
Effective support of simulation in computer architecture instruction.
Proceedings of the 2002 workshop on Computer architecture education, 2002

2001
Performance analysis using pipeline visualization.
Proceedings of the 2001 IEEE International Symposium on Performance Analysis of Systems and Software, 2001

CryptoManiac: a fast flexible architecture for secure communication.
Proceedings of the 28th Annual International Symposium on Computer Architecture, 2001

A Fault Tolerant Approach to Microprocessor Design.
Proceedings of the 2001 International Conference on Dependable Systems and Networks (DSN 2001) (formerly: FTCS), 2001

Scalable Hybrid Verification of Complex Microprocessors.
Proceedings of the 38th Design Automation Conference, 2001

Application specific architectures: a recipe for fast, flexible and power efficient designs.
Proceedings of the 2001 International Conference on Compilers, 2001

2000
Efficient checker processor design.
Proceedings of the 33rd Annual IEEE/ACM International Symposium on Microarchitecture, 2000


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