Todd M. Austin

According to our database, Todd M. Austin authored at least 136 papers between 1992 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

Exploring the Efficiency of Data-Oblivious Programs.

Lauren Biernacki, Biniyam Mengist Tiruye, Meron Zerihun Demissie, Fitsum Assamnew Andargie, Brandon Reagen, Todd M. Austin

Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2023

Security Verification of Low-Trust Architectures.

Qinhan Tan, Yonathan Fisseha, Shibo Chen, Lauren Biernacki, Jean-Baptiste Jeannin, Sharad Malik, Todd M. Austin

Proceedings of the 2023 ACM SIGSAC Conference on Computer and Communications Security, 2023

2022

These Aren't The Caches You're Looking For: Stochastic Channels on Randomized Caches.

Tarunesh Verma, Achilleas Anastasopoulos, Todd M. Austin

Proceedings of the 2022 IEEE International Symposium on Secure and Private Execution Environment Design (SEED), 2022

Sequestered Encryption: A Hardware Technique for Comprehensive Data Privacy.

Lauren Biernacki, Meron Zerihun Demissie, Kidus Birkayehu Workneh, Fitsum Assamnew Andargie, Todd M. Austin

Proceedings of the 2022 IEEE International Symposium on Secure and Private Execution Environment Design (SEED), 2022

Twine: A Chisel Extension for Component-Level Heterogeneous Design.

Shibo Chen, Yonathan Fisseha, Jean-Baptiste Jeannin, Todd M. Austin

Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

PriMax: maximizing DSL application performance with selective primitive acceleration.

Nicholas Wendt, Todd M. Austin, Valeria Bertacco

Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

2021

Software-driven Security Attacks: From Vulnerability Sources to Durable Hardware Defenses.

Lauren Biernacki, Mark Gallagher, Zhixing Xu, Misiker Tadesse Aga, Austin Harris, Shijia Wei, Mohit Tiwari, Baris Kasikci, Sharad Malik, Todd M. Austin

ACM J. Emerg. Technol. Comput. Syst., 2021

VIP-Bench: A Benchmark Suite for Evaluating Privacy-Enhanced Computation Frameworks.

Lauren Biernacki, Meron Zerihun Demissie, Kidus Birkayehu Workneh, Galane Basha Namomsa, Plato Gebremedhin, Fitsum Assamnew Andargie, Brandon Reagen, Todd M. Austin

Proceedings of the 2021 International Symposium on Secure and Private Execution Environment Design (SEED), 2021

ChipAdvisor: A Machine Learning Approach for Mapping Applications to Heterogeneous Systems.

Hiwot Tadese Kassa, Tarunesh Verma, Todd M. Austin, Valeria Bertacco

Proceedings of the 22nd International Symposium on Quality Electronic Design, 2021

A Defense-Inspired Benchmark Suite.

Pete Ehrett, Nathan Block, Bing Schaefer, Adrian Berding, John Paul Koenig, Pranav Srinivasan, Valeria Bertacco, Todd M. Austin

Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2021

Chopin: Composing Cost-Effective Custom Chips with Algorithmic Chiplets.

Pete Ehrett, Todd M. Austin, Valeria Bertacco

Proceedings of the 39th IEEE International Conference on Computer Design, 2021

Prodigy: Improving the Memory Latency of Data-Indirect Irregular Workloads Using Hardware-Software Co-Design.

Nishil Talati, Kyle May, Armand Behroozi, Yichen Yang, Kuba Kaszyk, Christos Vasiladiotis, Tarunesh Verma, Lu Li, Brandon Nguyen, Jiawen Sun, John Magnus Morton, Agreen Ahmadi, Todd M. Austin, Michael F. P. O'Boyle, Scott A. Mahlke, Trevor N. Mudge, Ronald G. Dreslinski

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2021

Morpheus II: A RISC-V Security Extension for Protecting Vulnerable Software and Hardware.

Todd M. Austin, Austin Harris, Tarunesh Verma, Shijia Wei, Alex Kisil, Misiker Tadesse Aga, Valeria Bertacco, Baris Kasikci, Mohit Tiwari

Proceedings of the IEEE Hot Chips 33 Symposium, 2021

Morpheus II: A RISC-V Security Extension for Protecting Vulnerable Software and Hardware.

Austin Harris, Tarunesh Verma, Shijia Wei, Lauren Biernacki, Alex Kisil, Misiker Tadesse Aga, Valeria Bertacco, Baris Kasikci, Mohit Tiwari, Todd M. Austin

Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2021

2020

Thwarting Control Plane Attacks with Displaced and Dilated Address Spaces.

Lauren Biernacki, Mark Gallagher, Valeria Bertacco, Todd M. Austin

Proceedings of the 2020 IEEE International Symposium on Hardware Oriented Security and Trust, 2020

2019

Neverland: Lightweight Hardware Extensions for Enforcing Operating System Integrity.

Salessawi Ferede Yitbarek, Todd M. Austin

CoRR, 2019

Cyclone: Detecting Contention-Based Cache Information Leaks Through Cyclic Interference.

Austin Harris, Shijia Wei, Prateek Sahu, Pranav Kumar, Todd M. Austin, Mohit Tiwari

Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, 2019

Wrangling in the Power of Code Pointers with ProxyCFI.

Misiker Tadesse Aga, Colton Holoday, Todd M. Austin

Proceedings of the Data and Applications Security and Privacy XXXIII, 2019

SiPterposer: A Fault-Tolerant Substrate for Flexible System-in-Package Design.

Pete Ehrett, Todd M. Austin, Valeria Bertacco

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

Smokestack: Thwarting DOP Attacks with Runtime Stack Layout Randomization.

Misiker Tadesse Aga, Todd M. Austin

Proceedings of the IEEE/ACM International Symposium on Code Generation and Optimization, 2019

Morpheus: A Vulnerability-Tolerant Secure Architecture Based on Ensembles of Moving Target Defenses with Churn.

Mark Gallagher, Lauren Biernacki, Shibo Chen, Zelalem Birhanu Aweke, Salessawi Ferede Yitbarek, Misiker Tadesse Aga, Austin Harris, Zhixing Xu, Baris Kasikci, Valeria Bertacco, Sharad Malik, Mohit Tiwari, Todd M. Austin

Proceedings of the Twenty-Fourth International Conference on Architectural Support for Programming Languages and Operating Systems, 2019

2018

SWAN: mitigating hardware trojans with design ambiguity.

Timothy Linscott, Pete Ehrett, Valeria Bertacco, Todd M. Austin

Proceedings of the International Conference on Computer-Aided Design, 2018

Vulnerability-tolerant secure architectures.

Todd M. Austin, Valeria Bertacco, Baris Kasikci, Sharad Malik, Mohit Tiwari

Proceedings of the International Conference on Computer-Aided Design, 2018

Øzone: Efficient execution with zero timing leakage for modern microarchitectures.

Zelalem Birhanu Aweke, Todd M. Austin

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

uSFI: Ultra-lightweight software fault isolation for IoT-class devices.

Zelalem Birhanu Aweke, Todd M. Austin

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

Reducing the overhead of authenticated memory encryption using delta encoding and ECC memory.

Salessawi Ferede Yitbarek, Todd M. Austin

Proceedings of the 55th Annual Design Automation Conference, 2018

2017

Exploiting the analog properties of digital circuits for malicious hardware.

Kaiyuan Yang, Matthew Hicks, Qing Dong, Todd M. Austin, Dennis Sylvester

Commun. ACM, 2017

SNIFFER: A high-accuracy malware detector for enterprise-based systems.

Evan Chavis, Harrison Davis, Yijun Hou, Matthew Hicks, Salessawi Ferede Yitbarek, Todd M. Austin, Valeria Bertacco

Proceedings of the IEEE 2nd International Verification and Security Workshop, 2017

Keynote: Peering into the post Moore's Law world.

Todd M. Austin

Proceedings of the 2017 IEEE/ACM International Symposium on Low Power Electronics and Design, 2017

Regaining Lost Cycles with HotCalls: A Fast Interface for SGX Secure Enclaves.

Ofir Weisse, Valeria Bertacco, Todd M. Austin

Proceedings of the 44th Annual International Symposium on Computer Architecture, 2017

Cold Boot Attacks are Still Hot: Security Analysis of Memory Scramblers in Modern Processors.

Salessawi Ferede Yitbarek, Misiker Tadesse Aga, Reetuparna Das, Todd M. Austin

Proceedings of the 2017 IEEE International Symposium on High Performance Computer Architecture, 2017

When good protections go bad: Exploiting anti-DoS measures to accelerate rowhammer attacks.

Misiker Tadesse Aga, Zelalem Birhanu Aweke, Todd M. Austin

Proceedings of the 2017 IEEE International Symposium on Hardware Oriented Security and Trust, 2017

Energy efficient object detection on the mobile GP-GPU.

Fitsum Assamnew Andargie, Jonathan Rose, Todd M. Austin, Valeria Bertacco

Proceedings of the IEEE AFRICON 2017, Cape Town, South Africa, September 18-20, 2017, 2017

2016

On Architectural Support for Systems Security.

Mohit Tiwari, Todd M. Austin

IEEE Micro, 2016

A2: Analog Malicious Hardware.

Kaiyuan Yang, Matthew Hicks, Qing Dong, Todd M. Austin, Dennis Sylvester

Proceedings of the IEEE Symposium on Security and Privacy, 2016

Exploring specialized near-memory processing for data intensive operations.

Salessawi Ferede Yitbarek, Tao Yang, Reetuparna Das, Todd M. Austin

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

ANVIL: Software-Based Protection Against Next-Generation Rowhammer Attacks.

Zelalem Birhanu Aweke, Salessawi Ferede Yitbarek, Rui Qiao, Reetuparna Das, Matthew Hicks, Yossi Oren, Todd M. Austin

Proceedings of the Twenty-First International Conference on Architectural Support for Programming Languages and Operating Systems, 2016

2015

Bridging the Moore's Law Performance Gap with Innovation Scaling.

Todd M. Austin

Proceedings of the 6th ACM/SPEC International Conference on Performance Engineering, Austin, TX, USA, January 31, 2015

Locking down insecure indirection with hardware-based control-data isolation.

William Arthur, Sahil Madeka, Reetuparna Das, Todd M. Austin

Proceedings of the 48th International Symposium on Microarchitecture, 2015

Keynote talk I: Ending the Tyranny of Amdahl's Law.

Todd M. Austin

Proceedings of the 33rd IEEE International Conference on Computer Design, 2015

Getting in control of your control flow with control-data isolation.

William Arthur, Ben Mehne, Reetuparna Das, Todd M. Austin

Proceedings of the 13th Annual IEEE/ACM International Symposium on Code Generation and Optimization, 2015

2013

Schnauzer: scalable profiling for likely security bug sites.

William Arthur, Biruk Mammo, Ricardo Rodríguez Jorge, Todd M. Austin, Valeria Bertacco

Proceedings of the 2013 IEEE/ACM International Symposium on Code Generation and Optimization, 2013

EVA: An efficient vision architecture for mobile systems.

Jason Clemons, Andrea Pellegrini, Silvio Savarese, Todd M. Austin

Proceedings of the International Conference on Compilers, 2013

2012

MVSS: Michigan Visual Sonification System.

Jason Clemons, Sid Ying-Ze Bao, Silvio Savarese, Todd M. Austin, Vinay Sharma

Proceedings of the 2012 IEEE International Conference on Emerging Signal Processing Applications, 2012

CrashTest'ing SWAT: Accurate, gate-level evaluation of symptom-based resiliency solutions.

Andrea Pellegrini, Robert Smolinski, Lei Chen, Xin Fu, Siva Kumar Sastry Hari, Junhao Jiang, Sarita V. Adve, Todd M. Austin, Valeria Bertacco

Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

A case for unlimited watchpoints.

Joseph L. Greathouse, Hongyi Xin, Yixin Luo, Todd M. Austin

Proceedings of the 17th International Conference on Architectural Support for Programming Languages and Operating Systems, 2012

2011

The potential of sampling for dynamic analysis.

Joseph L. Greathouse, Todd M. Austin

Proceedings of the 2011 Workshop on Programming Languages and Analysis for Security, 2011

Demand-driven software race detection using hardware performance counters.

Joseph L. Greathouse, Zhiqiang Ma, Matthew I. Frank, Ramesh Peri, Todd M. Austin

Proceedings of the 38th International Symposium on Computer Architecture (ISCA 2011), 2011

MEVBench: A mobile computer vision benchmarking suite.

Jason Clemons, Haishan Zhu, Silvio Savarese, Todd M. Austin

Proceedings of the 2011 IEEE International Symposium on Workload Characterization, 2011

EFFEX: an embedded processor for computer vision based feature extraction.

Jason Clemons, Andrew Jones, Robert Perricone, Silvio Savarese, Todd M. Austin

Proceedings of the 48th Design Automation Conference, 2011

Highly scalable distributed dataflow analysis.

Joseph L. Greathouse, Chelsea LeBlanc, Todd M. Austin, Valeria Bertacco

Proceedings of the CGO 2011, 2011

2010

Fault-based attack of RSA authentication.

Andrea Pellegrini, Valeria Bertacco, Todd M. Austin

Proceedings of the Design, Automation and Test in Europe, 2010

What input-language is the best choice for high level synthesis (HLS)?

Daniel Gajski, Todd M. Austin, Steve Svoboda

Proceedings of the 47th Design Automation Conference, 2010

Using introspective software-based testing for post-silicon debug and repair.

Kypros Constantinides, Todd M. Austin

Proceedings of the 47th Design Automation Conference, 2010

2009

Energy-Efficient Subthreshold Processor Design.

Bo Zhai, Sanjay Pant, Leyla Nazhandali, Scott Hanson, Javin Olson, Anna Reeves, Michael Minuth, Ryan Helfand, Todd M. Austin, Dennis Sylvester, David T. Blaauw

IEEE Trans. Very Large Scale Integr. Syst., 2009

A Flexible Software-Based Framework for Online Detection of Hardware Defects.

Kypros Constantinides, Onur Mutlu, Todd M. Austin, Valeria Bertacco

IEEE Trans. Computers, 2009

2008

Using Field-Repairable Control Logic to Correct Design Errors in Microprocessors.

Ilya Wagner, Valeria Bertacco, Todd M. Austin

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008

Exploiting selective placement for low-cost memory protection.

Mojtaba Mehrara, Todd M. Austin

ACM Trans. Archit. Code Optim., 2008

Exploring Variability and Performance in a Sub-200-mV Processor.

Scott Hanson, Bo Zhai, Mingoo Seok, Brian Cline, Kevin Zhou, Meghna Singhal, Michael Minuth, Javin Olson, Leyla Nazhandali, Todd M. Austin, Dennis Sylvester, David T. Blaauw

IEEE J. Solid State Circuits, 2008

Reliable Systems on Unreliable Fabrics.

Todd M. Austin, Valeria Bertacco, Scott A. Mahlke, Yu Cao

IEEE Des. Test Comput., 2008

Testudo: Heavyweight security analysis via statistical sampling.

Joseph L. Greathouse, Ilya Wagner, David A. Ramos, Gautam Bhatnagar, Todd M. Austin, Valeria Bertacco, Seth Pettie

Proceedings of the 41st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-41 2008), 2008

Online design bug detection: RTL analysis, flexible mechanisms, and evaluation.

Kypros Constantinides, Onur Mutlu, Todd M. Austin

Proceedings of the 41st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-41 2008), 2008

On the rules of low-power design (and how to break them).

Todd M. Austin

Proceedings of the 2008 International Symposium on Low Power Electronics and Design, 2008

Polymorphic On-Chip Networks.

Martha Mercaldi Kim, John D. Davis, Mark Oskin, Todd M. Austin

Proceedings of the 35th International Symposium on Computer Architecture (ISCA 2008), 2008

CrashTest: A fast high-fidelity FPGA-based resiliency analysis framework.

Andrea Pellegrini, Kypros Constantinides, Dan Zhang, Shobana Sudhakar, Valeria Bertacco, Todd M. Austin

Proceedings of the 26th International Conference on Computer Design, 2008

2007

Microprocessor Verification via Feedback-Adjusted Markov Models.

Ilya Wagner, Valeria Bertacco, Todd M. Austin

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

Architecting a reliable CMP switch architecture.

Kypros Constantinides, Stephen Plaza, Jason A. Blome, Valeria Bertacco, Scott A. Mahlke, Todd M. Austin, Bin Zhang, Michael Orshansky

ACM Trans. Archit. Code Optim., 2007

Software-Based Online Detection of Hardware Defects Mechanisms, Architectural Support, and Evaluation.

Kypros Constantinides, Onur Mutlu, Todd M. Austin, Valeria Bertacco

Proceedings of the 40th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-40 2007), 2007

Architectural implications of brick and mortar silicon manufacturing.

Martha Mercaldi Kim, Mojtaba Mehrara, Mark Oskin, Todd M. Austin

Proceedings of the 34th International Symposium on Computer Architecture (ISCA 2007), 2007

Low-cost protection for SER upsets and silicon defects.

Mojtaba Mehrara, Mona Attariyan, Smitha Shyam, Kypros Constantinides, Valeria Bertacco, Todd M. Austin

Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

2006

A self-tuning DVS processor using delay-error detection and correction.

Shidhartha Das, David Roberts, Seokwoo Lee, Sanjay Pant, David T. Blaauw, Todd M. Austin, Krisztián Flautner, Trevor N. Mudge

IEEE J. Solid State Circuits, 2006

Razor: a low-power pipeline based on circuit-level timing speculation.

Todd M. Austin

Proceedings of the 19th Annual Symposium on Integrated Circuits and Systems Design, 2006

Robust low power computing in the nanoscale era.

Todd M. Austin

Proceedings of the 19th Annual Symposium on Integrated Circuits and Systems Design, 2006

BulletProof: a defect-tolerant CMP switch architecture.

Kypros Constantinides, Stephen Plaza, Jason A. Blome, Bin Zhang, Valeria Bertacco, Scott A. Mahlke, Todd M. Austin, Michael Orshansky

Proceedings of the 12th International Symposium on High-Performance Computer Architecture, 2006

Shielding against design flaws with field repairable control logic.

Ilya Wagner, Valeria Bertacco, Todd M. Austin

Proceedings of the 43rd Design Automation Conference, 2006

Ultra low-cost defect protection for microprocessor pipelines.

Smitha Shyam, Kypros Constantinides, Sujay Phadke, Valeria Bertacco, Todd M. Austin

Proceedings of the 12th International Conference on Architectural Support for Programming Languages and Operating Systems, 2006

Depth-driven verification of simultaneous interfaces.

Ilya Wagner, Valeria Bertacco, Todd M. Austin

Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006

Reliability-aware data placement for partial memory protection in embedded processors.

Mojtaba Mehrara, Todd M. Austin

Proceedings of the 2006 workshop on Memory System Performance and Correctness, 2006

2005

Error Analysis for the Support of Robust Voltage Scaling.

David Roberts, Todd M. Austin, David T. Blaauw, Trevor N. Mudge, Krisztián Flautner

Proceedings of the 6th International Symposium on Quality of Electronic Design (ISQED 2005), 2005

Energy Optimization of Subthreshold-Voltage Sensor Network Processors.

Leyla Nazhandali, Bo Zhai, Javin Olson, Anna Reeves, Michael Minuth, Ryan Helfand, Sanjay Pant, Todd M. Austin, David T. Blaauw

Proceedings of the 32st International Symposium on Computer Architecture (ISCA 2005), 2005

Deployment of Better Than Worst-Case Design: Solutions and Needs.

Todd M. Austin, Valeria Bertacco

Proceedings of the 23rd International Conference on Computer Design (ICCD 2005), 2005

DVS for On-Chip Bus Designs Based on Timing Error Correction.

Himanshu Kaul, Dennis Sylvester, David T. Blaauw, Trevor N. Mudge, Todd M. Austin

Proceedings of the 2005 Design, 2005

StressTest: an automatic approach to test generation via activity monitors.

Ilya Wagner, Valeria Bertacco, Todd M. Austin

Proceedings of the 42nd Design Automation Conference, 2005

A second-generation sensor network processor with application-driven memory optimizations and out-of-order execution.

Leyla Nazhandali, Michael Minuth, Bo Zhai, Javin Olson, Todd M. Austin, David T. Blaauw

Proceedings of the 2005 International Conference on Compilers, 2005

Opportunities and challenges for better than worst-case design.

Todd M. Austin, Valeria Bertacco, David T. Blaauw, Trevor N. Mudge

Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

2004

Recent extensions to the SimpleScalar tool suite.

Doug Burger, Todd M. Austin, Stephen W. Keckler

SIGMETRICS Perform. Evaluation Rev., 2004

Razor: Circuit-Level Correction of Timing Errors for Low-Power Operation.

Dan Ernst, Shidhartha Das, Seokwoo Lee, David T. Blaauw, Todd M. Austin, Trevor N. Mudge, Nam Sung Kim, Krisztián Flautner

IEEE Micro, 2004

Mobile Supercomputers.

Todd M. Austin, David T. Blaauw, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Wayne H. Wolf

Computer, 2004

Making Typical Silicon Matter with Razor.

Todd M. Austin, David T. Blaauw, Trevor N. Mudge, Krisztián Flautner

Computer, 2004

Reducing pipeline energy demands with local DVS and dynamic retiming.

Seokwoo Lee, Shidhartha Das, Toan Pham, Todd M. Austin, David T. Blaauw, Trevor N. Mudge

Proceedings of the 2004 International Symposium on Low Power Electronics and Design, 2004

Microarchitectural power modeling techniques for deep sub-micron microprocessors.

Nam Sung Kim, Taeho Kgil, Valeria Bertacco, Todd M. Austin, Trevor N. Mudge

Proceedings of the 2004 International Symposium on Low Power Electronics and Design, 2004

Circuit-aware architectural simulation.

Seokwoo Lee, Shidhartha Das, Valeria Bertacco, Todd M. Austin, David T. Blaauw, Trevor N. Mudge

Proceedings of the 41th Design Automation Conference, 2004

Designing robust microarchitectures.

Todd M. Austin

Proceedings of the 41th Design Automation Conference, 2004

Memory system design space exploration for low-power, real-time speech recognition.

Rajeev Krishna, Scott A. Mahlke, Todd M. Austin

Proceedings of the 2nd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2004

2003

Measuring Architectural Vulnerability Factors.

Shubhendu S. Mukherjee, Christopher T. Weaver, Joel S. Emer, Steven K. Reinhardt, Todd M. Austin

IEEE Micro, 2003

Leakage Current: Moore's Law Meets Static Power.

Nam Sung Kim, Todd M. Austin, David T. Blaauw, Trevor N. Mudge, Krisztián Flautner, Jie S. Hu, Mary Jane Irwin, Mahmut T. Kandemir, Narayanan Vijaykrishnan

Computer, 2003

High Coverage Detection of Input-Related Security Faults.

Eric Larson, Todd M. Austin

Proceedings of the 12th USENIX Security Symposium, Washington, D.C., USA, August 4-8, 2003, 2003

A Systematic Methodology to Compute the Architectural Vulnerability Factors for a High-Performance Microprocessor.

Shubhendu S. Mukherjee, Christopher T. Weaver, Joel S. Emer, Steven K. Reinhardt, Todd M. Austin

Proceedings of the 36th Annual International Symposium on Microarchitecture, 2003

Razor: A Low-Power Pipeline Based on Circuit-Level Timing Speculation.

Dan Ernst, Nam Sung Kim, Shidhartha Das, Sanjay Pant, Rajeev R. Rao, Toan Pham, Conrad H. Ziesler, David T. Blaauw, Todd M. Austin, Krisztián Flautner, Trevor N. Mudge

Proceedings of the 36th Annual International Symposium on Microarchitecture, 2003

Cyclone: A Broadcast-Free Dynamic Instruction Scheduler with Selective Replay.

Dan Ernst, Andrew Hamel, Todd M. Austin

Proceedings of the 30th International Symposium on Computer Architecture (ISCA 2003), 2003

Architectural optimizations for low-power, real-time speech recognition.

Rajeev Krishna, Scott A. Mahlke, Todd M. Austin

Proceedings of the International Conference on Compilers, 2003

2002

Performance Simulation Tools.

Shubhendu S. Mukherjee, Sarita V. Adve, Todd M. Austin, Joel S. Emer, Peter S. Magnusson

Computer, 2002

SimpleScalar: An Infrastructure for Computer System Modeling.

Todd M. Austin, Eric Larson, Dan Ernst

Computer, 2002

Effective support of simulation in computer architecture instruction.

Christopher T. Weaver, Eric Larson, Todd M. Austin

Proceedings of the 2002 workshop on Computer architecture education, 2002

High Performance and Energy Efficient Serial Prefetch Architecture.

Glenn Reinman, Brad Calder, Todd M. Austin

Proceedings of the High Performance Computing, 4th International Symposium, 2002

Efficient Dynamic Scheduling Through Tag Elimination.

Dan Ernst, Todd M. Austin

Proceedings of the 29th International Symposium on Computer Architecture (ISCA 2002), 2002

2001

Optimizations Enabled by a Decoupled Front-End Architecture.

Glenn Reinman, Brad Calder, Todd M. Austin

IEEE Trans. Computers, 2001

Design for Verification?

Todd M. Austin

IEEE Des. Test Comput., 2001

Performance analysis using pipeline visualization.

Christopher T. Weaver, Kenneth C. Barr, Eric D. Marsman, Dan Ernst, Todd M. Austin

Proceedings of the 2001 IEEE International Symposium on Performance Analysis of Systems and Software, 2001

MASE: a novel infrastructure for detailed microarchitectural modeling.

Eric Larson, Saugata Chatterjee, Todd M. Austin

Proceedings of the 2001 IEEE International Symposium on Performance Analysis of Systems and Software, 2001

CryptoManiac: a fast flexible architecture for secure communication.

Lisa Wu, Christopher T. Weaver, Todd M. Austin

Proceedings of the 28th Annual International Symposium on Computer Architecture, 2001

A Fault Tolerant Approach to Microprocessor Design.

Christopher T. Weaver, Todd M. Austin

Proceedings of the 2001 International Conference on Dependable Systems and Networks (DSN 2001) (formerly: FTCS), 2001

Scalable Hybrid Verification of Complex Microprocessors.

Maher N. Mneimneh, Fadi A. Aloul, Christopher T. Weaver, Saugata Chatterjee, Karem A. Sakallah, Todd M. Austin

Proceedings of the 38th Design Automation Conference, 2001

Application specific architectures: a recipe for fast, flexible and power efficient designs.

Christopher T. Weaver, Rajeev Krishna, Lisa Wu, Todd M. Austin

Proceedings of the 2001 International Conference on Compilers, 2001

2000

DIVA: A Dynamic Approach to Microprocessor Verification.

Todd M. Austin

J. Instr. Level Parallelism, 2000

Compiler controlled value prediction using branch predictor based confidence.

Eric Larson, Todd M. Austin

Proceedings of the 33rd Annual IEEE/ACM International Symposium on Microarchitecture, 2000

Efficient checker processor design.

Saugata Chatterjee, Christopher T. Weaver, Todd M. Austin

Proceedings of the 33rd Annual IEEE/ACM International Symposium on Microarchitecture, 2000

Architectural Support for Fast Symmetric-Key Cryptography.

Jerome Burke, John McDonald, Todd M. Austin

Proceedings of the ASPLOS-IX Proceedings of the 9th International Conference on Architectural Support for Programming Languages and Operating Systems, 2000

1999

Challenges in processor modeling and validation [Guest Editors?? introduction].

Pradip Bose, Thomas M. Conte, Todd M. Austin

IEEE Micro, 1999

Memory Renaming: Fast, Early and Accurate Processing of Memory Communication.

Gary S. Tyson, Todd M. Austin

Int. J. Parallel Program., 1999

Fetch Directed Instruction Prefetching.

Glenn Reinman, Brad Calder, Todd M. Austin

Proceedings of the 32nd Annual IEEE/ACM International Symposium on Microarchitecture, 1999

DIVA: A Reliable Substrate for Deep Submicron Microarchitecture Design.

Todd M. Austin

Proceedings of the 32nd Annual IEEE/ACM International Symposium on Microarchitecture, 1999

A Scalable Front-End Architecture for Fast Instruction Delivery.

Glenn Reinman, Todd M. Austin, Brad Calder

Proceedings of the 26th Annual International Symposium on Computer Architecture, 1999

Classifying load and store instructions for memory renaming.

Glenn Reinman, Brad Calder, Dean M. Tullsen, Gary S. Tyson, Todd M. Austin

Proceedings of the 13th international conference on Supercomputing, 1999

1998

The SimpleScalar tool set as an instructional tool: experiences and future directions.

Todd M. Austin

Proceedings of the 1998 workshop on Computer architecture education, 1998

Cache-Conscious Data Placement.

Brad Calder, Chandra Krintz, Simmi John, Todd M. Austin

Proceedings of the ASPLOS-VIII Proceedings of the 8th International Conference on Architectural Support for Programming Languages and Operating Systems, 1998

Dynamic Hammock Predication for Non-Predicated Instruction Set Architectures.

Artur Klauser, Todd M. Austin, Dirk Grunwald, Brad Calder

Proceedings of the 1998 International Conference on Parallel Architectures and Compilation Techniques, 1998

1997

The SimpleScalar tool set, version 2.0.

Doug Burger, Todd M. Austin

SIGARCH Comput. Archit. News, 1997

Improving the Accuracy and Performance of Memory Communication Through Renaming.

Gary S. Tyson, Todd M. Austin

Proceedings of the Thirtieth Annual IEEE/ACM International Symposium on Microarchitecture, 1997

On High-Bandwidth Data Cache Design for Multi-Issue Processors.

Jude A. Rivers, Gary S. Tyson, Edward S. Davidson, Todd M. Austin

Proceedings of the Thirtieth Annual IEEE/ACM International Symposium on Microarchitecture, 1997

1996

High-Bandwidth Address Translation for Multiple-Issue Processors.

Todd M. Austin, Gurindar S. Sohi

Proceedings of the 23rd Annual International Symposium on Computer Architecture, 1996

Hardware and software mechanisms for reducing load latency.

Todd M. Austin

PhD thesis, 1996

1995

Zero-cycle loads: microarchitecture support for reducing load latency.

Todd M. Austin, Gurindar S. Sohi

Proceedings of the 28th Annual International Symposium on Microarchitecture, Ann Arbor, Michigan, USA, November 29, 1995

Streamlining Data Cache Access with Fast Address Calculation.

Todd M. Austin, Dionisios N. Pnevmatikatos, Gurindar S. Sohi

Proceedings of the 22nd Annual International Symposium on Computer Architecture, 1995

1994

Efficient Detection of All Pointer and Array Access Errors.

Todd M. Austin, Scott E. Breach, Gurindar S. Sohi

Proceedings of the ACM SIGPLAN'94 Conference on Programming Language Design and Implementation (PLDI), 1994

1992

Dynamic Dependency Analysis of Ordinary Programs.

Todd M. Austin, Gurindar S. Sohi

Proceedings of the 19th Annual International Symposium on Computer Architecture. Gold Coast, 1992