Chuanbin Zeng

According to our database, Chuanbin Zeng authored at least 3 papers between 2019 and 2026.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2026

MergFS: Efficient Bridging of a 32-bit High-Speed Intra-Core Bus to a 64-bit Low-Speed AHB-Lite Bus.

Zewen Cao, Lida Xu, Zhuo Peng, Yuying Dong, Hongrui Ruan, Chuanbin Zeng, Hualong Zhao, Jiajun Luo

IEEE Trans. Circuits Syst. I Regul. Pap., January, 2026

2025

RIVL: A Low-Cost SoC Agile Development Platform for Multiple RISC-V Processors Design and Verification.

Lida Xu, Zewen Cao, Hualong Zhao, Zhuo Peng, Yuchi Miao, Chunan Zhuang, Hongrui Ruan, Yuying Dong, Chuanbin Zeng, Bo Li, Jiajun Luo

IEEE Trans. Circuits Syst. I Regul. Pap., April, 2025

2019

Effect of Radiation on Interface Traps of SOI NMOSFETs by the Direct-Current Current-Voltage Technique.

Yangyang Li, Xiaojing Li, Bo Li, Linchun Gao, Weiwei Yan, Fangfang Wang, Duoli Li, Chuanbin Zeng, Jiajun Luo, Zhengsheng Han

IEEE Access, 2019