Michel Langevin

According to our database1, Michel Langevin authored at least 28 papers between 1990 and 2013.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.



In proceedings 
PhD thesis 


On csauthors.net:


A dynamic stream link for efficient data flow control in NoC based heterogeneous MPSoC.
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013

Integrating Memory Optimization with Mapping Algorithms for Multi-Processors System-on-Chip.
ACM Trans. Embed. Comput. Syst., 2012

On the Verification of a WiMax Design Using Symbolic Simulation.
Proceedings of the Proceedings Fourth International Symposium on Symbolic Computation in Software Science, 2012

Combining mapping and partitioning exploration for NoC-based embedded systems.
J. Syst. Archit., 2010

Combining memory optimization with mapping of multimedia applications for multi-processors system-on-chip.
Proceedings of the 21st IEEE International Symposium on Rapid System Prototyping, 2010

MpAssign: A framework for solving the many-core platform mapping problem.
Proceedings of the 21st IEEE International Symposium on Rapid System Prototyping, 2010

Optimizing Configuration and Application Mapping for MPSoC Architectures.
Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems, 2009

An FPGA Implementation of a Scalable Network-on-Chip Based on the Token Ring Concept.
Proceedings of the 14th IEEE International Conference on Electronics, 2007

Parallel programming models for a multiprocessor SoC platform applied to networking and multimedia.
IEEE Trans. Very Large Scale Integr. Syst., 2006

Distributed object models for multi-processor SoC's, with application to low-power multimedia wireless systems.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006

A Multiprocessor SoC Platform and Tools for Communications Applications.
Proceedings of the Embedded Systems Handbook., 2005

Application of a Multi-Processor SoC Platform to High-Speed Packet Forwarding.
Proceedings of the 2004 Design, 2004

Parallel programming models for a multi-processor SoC platform applied to high-speed traffic management.
Proceedings of the 2nd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2004

Modeling and formal verification of the Fairisle ATM switch fabricusing MDGs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999

Multiway Decision Graphs for Automated Hardware Verification.
Formal Methods Syst. Des., 1997

Verification with Abstract State Machines Using MDGs.
Proceedings of the Formal Hardware Verification - Methods and Systems in Comparison, 1997

A recursive technique for computing lower-bound performance of schedules.
ACM Trans. Design Autom. Electr. Syst., 1996

Behavioral Verification of an ATM Switch Fabric using Implicit Abstract State Enumeration.
Proceedings of the 1996 International Conference on Computer Design (ICCD '96), 1996

Formal Verification of an ATM Switch Fabric using Multiway Decision Graphs.
Proceedings of the 6th Great Lakes Symposium on VLSI (GLS-VLSI '96), 1996

Formal Verification of the Island Tunnel Controller Using Multiway Decision Graphs.
Proceedings of the Formal Methods in Computer-Aided Design, First International Conference, 1996

MDG Tools for the Verification of RTL Designs.
Proceedings of the Computer Aided Verification, 8th International Conference, 1996

WWW based structuring of codesigns.
Proceedings of the 8th International Symposium on System Synthesis (ISSS 1995), 1995

Partitioning transition relations efficiently and automatically.
Proceedings of the 5th Great Lakes Symposium on VLSI (GLS-VLSI '95), 1995

State enumeration with abstract descriptions of state machines.
Proceedings of the Correct Hardware Design and Verification Methods, 1995

An Extended OBDD Representation for Extended FSMs.
Proceedings of the EDAC - The European Conference on Design Automation, ETC - European Test Conference, EUROASIC - The European Event in ASIC Design, Proceedings, February 28, 1994

Local microcode generation in system design.
Proceedings of the Code Generation for Embedded Processors [Dagstuhl Workshop, Dagstuhl, Germany, August 31, 1994

Comparing Generic State Machines.
Proceedings of the Computer Aided Verification, 3rd International Workshop, 1991

Automated RTL Verification Based on Predicate Calculus.
Proceedings of the Computer Aided Verification, 2nd International Workshop, 1990