Dae-Gi Bae

According to our database1, Dae-Gi Bae authored at least 2 papers between 2003 and 2008.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2008
A 100nm Double-Stacked 500MHz 72Mb Separate-I/O Synchronous SRAM with Automatic Cell-Bias Scheme and Adaptive Block Redundancy.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

2003
A 1.2-V 1.5-Gb/s 72-Mb DDR3 SRAM.
IEEE J. Solid State Circuits, 2003


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