Daniele Rolfo

According to our database1, Daniele Rolfo authored at least 22 papers between 2011 and 2015.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2015
High-performance hardware accelerators for image processing in space applications.
PhD thesis, 2015

SA-FEMIP: A Self-Adaptive Features Extractor and Matcher IP-Core Based on Partially Reconfigurable FPGAs for Space Applications.
IEEE Trans. Very Large Scale Integr. Syst., 2015

SATTA: A Self-Adaptive Temperature-Based TDF Awareness Methodology for Dynamically Reconfigurable FPGAs.
ACM Trans. Reconfigurable Technol. Syst., 2015

2014
A novel algorithm and hardware architecture for fast video-based shape reconstruction of space debris.
EURASIP J. Adv. Signal Process., 2014

A novel methodology to increase fault tolerance in autonomous FPGA-based systems.
Proceedings of the 2014 IEEE 20th International On-Line Testing Symposium, 2014

Evaluation of image deblurring algorithms for real-time applications.
Proceedings of the 9th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2014

A fault injection methodology and infrastructure for fast single event upsets emulation on Xilinx SRAM-based FPGAs.
Proceedings of the 2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2014

ABLUR: An FPGA-based adaptive deblurring core for real-time applications.
Proceedings of the 2014 NASA/ESA Conference on Adaptive Hardware and Systems, 2014

2013
Fault mitigation strategies for CUDA GPUs.
Proceedings of the 2013 IEEE International Test Conference, 2013

Increasing the robustness of CUDA Fermi GPU-based systems.
Proceedings of the 2013 IEEE 19th International On-Line Testing Symposium (IOLTS), 2013

Blurring prediction in monocular SLAM.
Proceedings of the 8th International Design and Test Symposium, 2013

SAFE: A self adaptive frame enhancer FPGA-based IP-core for real-time space applications.
Proceedings of the 8th International Design and Test Symposium, 2013

ZipStream: Improving dependability in dynamic partial reconfiguration.
Proceedings of the 8th International Design and Test Symposium, 2013

FEMIP: A high performance FPGA-based features extractor & matcher for space applications.
Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

Dependable Dynamic Partial Reconfiguration with minimal area & time overheads on Xilinx FPGAS.
Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

A software-based self test of CUDA Fermi GPUs.
Proceedings of the 18th IEEE European Test Symposium, 2013

Stereo vision system for capture and removal of space debris.
Proceedings of the 2013 Conference on Design and Architectures for Signal and Image Processing, 2013

AIDI: An adaptive image denoising FPGA-based IP-core for real-time applications.
Proceedings of the 2013 NASA/ESA Conference on Adaptive Hardware and Systems, 2013

2011
An area-efficient 2-D convolution implementation on FPGA for space applications.
Proceedings of the 6th IEEE International Design and Test Workshop, 2011

Validation & Verification of an EDA automated synthesis tool.
Proceedings of the 6th IEEE International Design and Test Workshop, 2011

A unifying formalism to support automated synthesis of SBSTs for embedded caches.
Proceedings of the 9th East-West Design & Test Symposium, 2011

MarciaTesta: An Automatic Generator of Test Programs for Microprocessors' Data Caches.
Proceedings of the 20th IEEE Asian Test Symposium, 2011


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