DanYu Wu

According to our database1, DanYu Wu authored at least 12 papers between 2014 and 2020.

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Bibliography

2020
Frequency-Domain Modeling and Analysis of Injection-Locked Oscillators.
IEEE J. Solid State Circuits, 2020

A 50-112-Gb/s PAM-4 Transmitter With a Fractional-Spaced FFE in 65-nm CMOS.
IEEE J. Solid State Circuits, 2020

2019
An 8 GSps 14 bit RF DAC With IM3<-62 dBc up to 3.6 GHz.
IEEE Trans. Circuits Syst. II Express Briefs, 2019

A 1 GS/s 12-bit pipelined folding ADC with a novel encoding algorithm.
IEICE Electron. Express, 2019

A 10-GS/s 8-bit 4-way interleaved folding ADC in 0.18 µm SiGe-BiCMOS.
IEICE Electron. Express, 2019

A 10-GS/s 8-bit SiGe ADC with Isolated 4×4 Analog Input Multiplexer.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

A 112-Gb/s PAM-4 Transmitter With a 2-Tap Fractional-Spaced FFE in 65-nm CMOS.
Proceedings of the 45th IEEE European Solid State Circuits Conference, 2019

2017
A 400-MS/s 10-b 8 interleaved SAR ADC in 0.13 um CMOS.
IEICE Electron. Express, 2017

A 6 mW 325 MS/s 8 bit SAR ADC with background offset calibration.
IEICE Electron. Express, 2017

A four-channel time-interleaved 30-GS/s 6-bit ADC in 0.18 μm SiGe BiCMOS technology.
Sci. China Inf. Sci., 2017

2016
A 30Gsps 6bit DAC in SiGe BiCMOS technology.
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

2014
A 4-GS/s 8-bit two-channel time-interleaved folding and interpolating ADC.
Sci. China Inf. Sci., 2014


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