David Mallasén

Orcid: 0000-0002-0166-834X

According to our database1, David Mallasén authored at least 12 papers between 2020 and 2026.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

Online presence:

On csauthors.net:

Bibliography

2026
Increasing the Energy Efficiency of Wearables Using Low-Precision Posit Arithmetic With PHEE.
IEEE Trans. Circuits Syst. Artif. Intell., April, 2026

Navigating Posit Arithmetic: A Comprehensive Survey of Principles, Hardware, and Applications.
ACM Comput. Surv., April, 2026


2025
Exploring Low-Cost Platforms for Automatic Chess Digitization.
J. Comput. Sci. Technol., 2025

2024
Big-PERCIVAL: Exploring the Native Use of 64-Bit Posit Arithmetic in Scientific Computing.
IEEE Trans. Computers, June, 2024

2023
PLAUs: Posit Logarithmic Approximate Units to Implement Low-Cost Operations with Real Numbers.
Proceedings of the Next Generation Arithmetic - 4th International Conference, 2023

PERCIVAL: Deploying Posits and Quire Arithmetic into the CVA6 RISC-V Core.
Proceedings of the 20th ACM International Conference on Computing Frontiers, 2023

2022
Customizing the CVA6 RISC-V Core to Integrate Posit and Quire Instructions.
Proceedings of the 37th Conference on Design of Circuits and Integrated Systems, 2022

Comparing Different Decodings for Posit Arithmetic.
Proceedings of the Next Generation Arithmetic - Third International Conference, 2022

PERCIVAL: Open-Source Posit RISC-V Core With Quire Capability.
Proceedings of the 29th IEEE Symposium on Computer Arithmetic, 2022

2021
Energy-Efficient MAC Units for Fused Posit Arithmetic.
Proceedings of the 39th IEEE International Conference on Computer Design, 2021

2020
LiveChess2FEN: a Framework for Classifying Chess Pieces based on CNNs.
CoRR, 2020


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