Raul Murillo

Orcid: 0000-0003-0204-0797

Affiliations:
  • Complutense University of Madrid, Department of Computer Architecture and Automation, Spain


According to our database1, Raul Murillo authored at least 15 papers between 2019 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2024
HUB Meets Posit: Arithmetic Units Implementation.
IEEE Trans. Circuits Syst. II Express Briefs, January, 2024

2023
Generating Posit-Based Accelerators With High-Level Synthesis.
IEEE Trans. Circuits Syst. I Regul. Pap., October, 2023

PLAUs: Posit Logarithmic Approximate Units to Implement Low-Cost Operations with Real Numbers.
Proceedings of the Next Generation Arithmetic - 4th International Conference, 2023

PERCIVAL: Deploying Posits and Quire Arithmetic into the CVA6 RISC-V Core.
Proceedings of the 20th ACM International Conference on Computing Frontiers, 2023

A Suite of Division Algorithms for Posit Arithmetic.
Proceedings of the 34th IEEE International Conference on Application-specific Systems, 2023

2022
PLAM: A Posit Logarithm-Approximate Multiplier.
IEEE Trans. Emerg. Top. Comput., 2022

PERCIVAL: Open-Source Posit RISC-V Core With Quire Capability.
IEEE Trans. Emerg. Top. Comput., 2022

Customizing the CVA6 RISC-V Core to Integrate Posit and Quire Instructions.
Proceedings of the 37th Conference on Design of Circuits and Integrated Systems, 2022

Comparing Different Decodings for Posit Arithmetic.
Proceedings of the Next Generation Arithmetic - Third International Conference, 2022

The Effects of Numerical Precision In Scientific Applications.
Proceedings of the Annual Modeling and Simulation Conference, 2022

2021
PLAM: a Posit Logarithm-Approximate Multiplier for Power Efficient Posit-based DNNs.
CoRR, 2021

Energy-Efficient MAC Units for Fused Posit Arithmetic.
Proceedings of the 39th IEEE International Conference on Computer Design, 2021

2020
Deep PeNSieve: A deep learning framework based on the posit number system.
Digit. Signal Process., 2020

Customized Posit Adders and Multipliers using the FloPoCo Core Generator.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019
Template-Based Posit Multiplication for Training and Inferring in Neural Networks.
CoRR, 2019


  Loading...