Pasquale Davide Schiavone

According to our database, Pasquale Davide Schiavone authored at least 19 papers between 2015 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Performance evaluation of acceleration of convolutional layers on OpenEdgeCGRA.

Nicolò Carpentieri, Juan Sapriza, Pasquale Davide Schiavone, Daniele Jahier Pagliari, David Atienza, Maurizio Martina, Alessio Burrello

CoRR, 2024

X-HEEP: An Open-Source, Configurable and Extendible RISC-V Microcontroller for the Exploration of Ultra-Low-Power Edge Accelerators.

Simone Machetti, Pasquale Davide Schiavone, Thomas Christoph Müller, Miguel Peón Quirós, David Atienza

CoRR, 2024

2023

X-HEEP: An Open-Source, Configurable and Extendible RISC-V Microcontroller.

Pasquale Davide Schiavone, Simone Machetti, Miguel Peón Quirós, Jose Miranda, Benoît W. Denkinger, Thomas Christoph Müller, Ruben Rodríguez, Saverio Nasturzio, David Atienza Alonso

Proceedings of the 20th ACM International Conference on Computing Frontiers, 2023

2022

Motor-Unit Ordering of Blindly-Separated Surface-EMG Signals for Gesture Recognition.

Mattia Orlandi, Marcello Zanghieri, Pasquale Davide Schiavone, Elisa Donati, Francesco Conti, Simone Benatti

Proceedings of the Advances in System-Integrated Intelligence, 2022

sEMG Neural Spikes Reconstruction for Gesture Recognition on a Low-Power Multicore Processor.

Mattia Orlandi, Marcello Zanghieri, Victor Javier Kartsch Morinigo, Francesco Conti, Pasquale Davide Schiavone, Luca Benini, Simone Benatti

Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2022

2021

Arnold: An eFPGA-Augmented RISC-V SoC for Flexible and Low-Power IoT End Nodes.

Pasquale Davide Schiavone, Davide Rossi, Alfio Di Mauro, Frank K. Gürkaynak, Timothy Saxe, Mao Wang, Ket Chong Yap, Luca Benini

IEEE Trans. Very Large Scale Integr. Syst., 2021

Tiny-FPU: Low-Cost Floating-Point Support for Small RISC-V MCU Cores.

Luca Bertaccini, Matteo Perotti, Stefan Mach, Pasquale Davide Schiavone, Florian Zaruba, Luca Benini

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020

Always-On 674μ W@4GOP/s Error Resilient Binary Neural Networks With Aggressive SRAM Voltage Scaling on a 22-nm IoT End-Node.

Alfio Di Mauro, Francesco Conti, Pasquale Davide Schiavone, Davide Rossi, Luca Benini

IEEE Trans. Circuits Syst., 2020

Always-On 674uW @ 4GOP/s Error Resilient Binary Neural Networks with Aggressive SRAM Voltage Scaling on a 22nm IoT End-Node.

Alfio Di Mauro, Francesco Conti, Pasquale Davide Schiavone, Davide Rossi, Luca Benini

CoRR, 2020

Neuro-PULP: A Paradigm Shift Towards Fully Programmable Platforms for Neural Interfaces.

Pasquale Davide Schiavone, Davide Rossi, Yan Liu, Simone Benatti, Song Luan, Ian Williams, Luca Benini, Timothy G. Constandinou

Proceedings of the 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2020

2019

On-line Testing for Autonomous Systems driven by RISC-V Processor Design Verification.

Annachiara Ruospo, Riccardo Cantoro, Ernesto Sánchez, Pasquale Davide Schiavone, Angelo Garofalo, Luca Benini

Proceedings of the 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2019

2018

XNOR Neural Engine: A Hardware Accelerator IP for 21.6-fJ/op Binary Neural Network Inference.

Francesco Conti, Pasquale Davide Schiavone, Luca Benini

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

A sensor fusion approach for drowsiness detection in wearable ultra-low-power systems.

Victor Javier Kartsch, Simone Benatti, Pasquale Davide Schiavone, Davide Rossi, Luca Benini

Inf. Fusion, 2018

An Open-Source Verification Framework for Open-Source Cores: A RISC-V Case Study.

Pasquale Davide Schiavone, Ernesto Sánchez, Annachiara Ruospo, Francesco Minervini, Florian Zaruba, Germain Haugou, Luca Benini

Proceedings of the IFIP/IEEE International Conference on Very Large Scale Integration, 2018

Fast and Accurate Multiclass Inference for MI-BCIs Using Large Multiscale Temporal and Spectral Features.

Michael Hersche, Tino Rellstab, Pasquale Davide Schiavone, Lukas Cavigelli, Luca Benini, Abbas Rahimi

Proceedings of the 26th European Signal Processing Conference, 2018

2017

Near-Threshold RISC-V Core With DSP Extensions for Scalable IoT Endpoint Devices.

Michael Gautschi, Pasquale Davide Schiavone, Andreas Traber, Igor Loi, Antonio Pullini, Davide Rossi, Eric Flamand, Frank K. Gürkaynak, Luca Benini

IEEE Trans. Very Large Scale Integr. Syst., 2017

An IoT Endpoint System-on-Chip for Secure and Energy-Efficient Near-Sensor Analytics.

Francesco Conti, Robert Schilling, Pasquale Davide Schiavone, Antonio Pullini, Davide Rossi, Frank Kagan Gürkaynak, Michael Muehlberghuber, Michael Gautschi, Igor Loi, Germain Haugou, Stefan Mangard, Luca Benini

IEEE Trans. Circuits Syst. I Regul. Pap., 2017

Slow and steady wins the race? A comparison of ultra-low-power RISC-V cores for Internet-of-Things applications.

Pasquale Davide Schiavone, Francesco Conti, Davide Rossi, Michael Gautschi, Antonio Pullini, Eric Flamand, Luca Benini

Proceedings of the 27th International Symposium on Power and Timing Modeling, 2017

2015

An evolutionary approach for test program compaction.

Riccardo Cantoro, Marco Gaudesi, Ernesto Sánchez, Pasquale Davide Schiavone, Giovanni Squillero

Proceedings of the 16th Latin-American Test Symposium, 2015