David Meisner

According to our database1, David Meisner authored at least 20 papers between 2007 and 2017.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
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Links

On csauthors.net:

Bibliography

2017
Reining in Long Tails in Warehouse-Scale Computers with Quick Voltage Boosting Using Adrenaline.
ACM Trans. Comput. Syst., 2017

2016
Treadmill: Attributing the Source of Tail Latency through Precise Load Testing and Statistical Inference.
Proceedings of the 43rd ACM/IEEE Annual International Symposium on Computer Architecture, 2016

2015
Adrenaline: Pinpointing and reining in tail queries with quick voltage boosting.
Proceedings of the 21st IEEE International Symposium on High Performance Computer Architecture, 2015

2014
The Mystery Machine: End-to-end Performance Analysis of Large-scale Internet Services.
Proceedings of the 11th USENIX Symposium on Operating Systems Design and Implementation, 2014

2013
Thin servers with smart pipes: designing SoC accelerators for memcached.
Proceedings of the 40th Annual International Symposium on Computer Architecture, 2013

2012
Architecting Efficient Data Centers.
PhD thesis, 2012

Active Low-Power Modes for Main Memory with MemScale.
IEEE Micro, 2012

CoScale: Coordinating CPU and Memory System DVFS in Server Systems.
Proceedings of the 45th Annual IEEE/ACM International Symposium on Microarchitecture, 2012

BigHouse: A simulation infrastructure for data center systems.
Proceedings of the 2012 IEEE International Symposium on Performance Analysis of Systems & Software, 2012

MultiScale: memory system DVFS with multiple memory controllers.
Proceedings of the International Symposium on Low Power Electronics and Design, 2012

DreamWeaver: architectural support for deep sleep.
Proceedings of the 17th International Conference on Architectural Support for Programming Languages and Operating Systems, 2012

2011
The PowerNap Server Architecture.
ACM Trans. Comput. Syst., 2011

Towards a scalable data center-level evaluation methodology.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2011

Does low-power design imply energy efficiency for data centers?
Proceedings of the 2011 International Symposium on Low Power Electronics and Design, 2011

Power management of online data-intensive services.
Proceedings of the 38th International Symposium on Computer Architecture (ISCA 2011), 2011

MemScale: active low-power modes for main memory.
Proceedings of the 16th International Conference on Architectural Support for Programming Languages and Operating Systems, 2011

2010
Peak power modeling for data center servers with switched-mode power supplies.
Proceedings of the 2010 International Symposium on Low Power Electronics and Design, 2010

Power routing: dynamic power provisioning in the data center.
Proceedings of the 15th International Conference on Architectural Support for Programming Languages and Operating Systems, 2010

2009
PowerNap: eliminating server idle power.
Proceedings of the 14th International Conference on Architectural Support for Programming Languages and Operating Systems, 2009

2007
Hardware libraries: An architecture for economic acceleration in soft multi-core environments.
Proceedings of the 25th International Conference on Computer Design, 2007


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