David Overhauser

According to our database, David Overhauser authored at least 16 papers between 1988 and 2006.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2006

Who is really responsible for quality throughout the design process?.

Ron Wilson, David Overhauser

Proceedings of the 7th International Symposium on Quality of Electronic Design (ISQED 2006), 2006

2002

Power Crisis in SoC Design: Strategies for Constructing Low-Power, High-Performance SoC Designs.

K. Brock, C. Edwards, R. Lannoo, Ulf Schlichtmann, Antun Domic, Jacques Benkoski, David Overhauser, M. Kliment

Proceedings of the 2002 Design, 2002

2000

Clock skew verification in the presence of IR-drop in the powerdistribution network.

Resve A. Saleh, Syed Zakir Hussain, Steffen Rochel, David Overhauser

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000

When bad things happen to good chips (panel session).

N. S. Nagaraj, Andrzej J. Strojwas, Sani R. Nassif, Ray Hokinson, Tak Young, Wonjae L. Kang, David Overhauser, Sung-Mo Kang

Proceedings of the 37th Conference on Design Automation, 2000

1999

Clock verification in the presence of IR-drop in the power distribution network.

Syed Zakir Hussain, Steften Rochel, David Overhauser, Resve Saleh

Proceedings of the IEEE 1999 Custom Integrated Circuits Conference, 1999

1998

Power distribution in high-performance design.

Michael Benoit, Sandy Taylor, David Overhauser, Steffen Rochel

Proceedings of the 1998 International Symposium on Low Power Electronics and Design, 1998

Full-chip verification of UDSM designs.

Resve A. Saleh, David Overhauser, Sandy Taylor

Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, 1998

Full-Chip Verification Methods for DSM Power Distribution Systems.

Gregory Steele, David Overhauser, Steffen Rochel, Syed Zakir Hussain

Proceedings of the 35th Conference on Design Automation, 1998

1995

Methods to improve digital MOS macromodel accuracy.

Jeong-Taek Kong, David Overhauser

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995

Combining RC-Interconnect Effects with Nonlinear MOS Macromodels.

Jeong-Taek Kong, David Overhauser

Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

Improving Digital MOS Macromodel Accuracy.

Jeong-Taek Kong, Syed Zakir Hussain, David Overhauser

Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

Automatic Dynamic Mixed-Mode Simulation Through Network Reconfiguration.

Syed Zakir Hussain, David Overhauser

Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

A Novel Graph Algorithm for Circuit Recognition.

Kai-Ti Huang, David Overhauser

Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

1989

Fast timing simulation of MOS VLSI circuits

David Overhauser

PhD thesis, 1989

Automatic mixed-mode timing simulation.

David Overhauser, Ibrahim N. Hajj, Yi-Fan Hsu

Proceedings of the 1989 IEEE International Conference on Computer-Aided Design, 1989

1988

A tabular macromodeling approach to fast timing simulation including parasitics.

David Overhauser, Ibrahim N. Hajj

Proceedings of the 1988 IEEE International Conference on Computer-Aided Design, 1988