Dillon Huff

According to our database, Dillon Huff authored at least 9 papers between 2018 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

Unified Buffer: Compiling Image Processing and Machine Learning Applications to Push-Memory Accelerators.

Qiaoyi Liu, Jeff Setter, Dillon Huff, Maxwell Strange, Kathleen Feng, Mark Horowitz, Priyanka Raina, Fredrik Kjolstad

ACM Trans. Archit. Code Optim., June, 2023

AHA: An Agile Approach to the Design of Coarse-Grained Reconfigurable Accelerators and Compilers.

Kalhan Koul, Jackson Melchert, Kavya Sreedhar, Leonard Truong, Gedeon Nyengele, Keyi Zhang, Qiaoyi Liu, Jeff Setter, Po-Han Chen, Yuchen Mei, Maxwell Strange, Ross Daly, Caleb Donovick, Alex Carsello, Taeyoung Kong, Kathleen Feng, Dillon Huff, Ankita Nayak, Rajsekhar Setaluri, James Thomas, Nikhil Bhagdikar, David Durst, Zachary Myers, Nestan Tsiskaridze, Stephen Richardson, Rick Bahr, Kayvon Fatahalian, Pat Hanrahan, Clark W. Barrett, Mark Horowitz, Christopher Torng, Fredrik Kjolstad, Priyanka Raina

ACM Trans. Embed. Comput. Syst., March, 2023

2021

A polyhedral compiler for image processing hardware.

Dillon Huff

PhD thesis, 2021

Compiling Halide Programs to Push-Memory Accelerators.

Qiaoyi Liu, Dillon Huff, Jeff Setter, Maxwell Strange, Kathleen Feng, Kavya Sreedhar, Ziheng Wang, Keyi Zhang, Mark Horowitz, Priyanka Raina, Fredrik Kjolstad

CoRR, 2021

Clockwork: Resource-Efficient Static Scheduling for Multi-Rate Image Processing Applications on FPGAs.

Dillon Huff, Steve Dai, Pat Hanrahan

Proceedings of the FPGA '21: The 2021 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, Virtual Event, USA, February 28, 2021

2020

Type-directed scheduling of streaming accelerators.

David Durst, Matthew Feldman, Dillon Huff, David Akeley, Ross G. Daly, Gilbert Louis Bernstein, Marco Patrignani, Kayvon Fatahalian, Pat Hanrahan

Proceedings of the 41st ACM SIGPLAN International Conference on Programming Language Design and Implementation, 2020

Creating an Agile Hardware Design Flow.

Rick Bahr, Clark W. Barrett, Nikhil Bhagdikar, Alex Carsello, Ross Daly, Caleb Donovick, David Durst, Kayvon Fatahalian, Kathleen Feng, Pat Hanrahan, Teguh Hofstee, Mark Horowitz, Dillon Huff, Fredrik Kjolstad, Taeyoung Kong, Qiaoyi Liu, Makai Mann, Jackson Melchert, Ankita Nayak, Aina Niemetz, Gedeon Nyengele, Priyanka Raina, Stephen Richardson, Rajsekhar Setaluri, Jeff Setter, Kavya Sreedhar, Maxwell Strange, James Thomas, Christopher Torng, Leonard Truong, Nestan Tsiskaridze, Keyi Zhang

Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2018

Using Runtime Circuit Specialization to Accelerate Simulations of Reconfigurable Architectures.

Dillon Huff, Pat Hanrahan

Proceedings of the 2018 International Conference on ReConFigurable Computing and FPGAs, 2018

CoSA: Integrated Verification for Agile Hardware Design.

Cristian Mattarei, Makai Mann, Clark W. Barrett, Ross G. Daly, Dillon Huff, Pat Hanrahan

Proceedings of the 2018 Formal Methods in Computer Aided Design, 2018