Kathleen Feng

Orcid: 0000-0001-9860-4942

According to our database1, Kathleen Feng authored at least 9 papers between 2020 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

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Bibliography

2024
Amber: A 16-nm System-on-Chip With a Coarse- Grained Reconfigurable Array for Flexible Acceleration of Dense Linear Algebra.
IEEE J. Solid State Circuits, March, 2024

2023
Unified Buffer: Compiling Image Processing and Machine Learning Applications to Push-Memory Accelerators.
ACM Trans. Archit. Code Optim., June, 2023

AHA: An Agile Approach to the Design of Coarse-Grained Reconfigurable Accelerators and Compilers.
ACM Trans. Embed. Comput. Syst., March, 2023

APEX: A Framework for Automated Processing Element Design Space Exploration using Frequent Subgraph Analysis.
Proceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2023

2022
Amber: A 367 GOPS, 538 GOPS/W 16nm SoC with a Coarse-Grained Reconfigurable Array for Flexible Acceleration of Dense Linear Algebra.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022


2021
Compiling Halide Programs to Push-Memory Accelerators.
CoRR, 2021

Automated Design Space Exploration of CGRA Processing Element Architectures using Frequent Subgraph Analysis.
CoRR, 2021

2020


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