Dong-Suk Lee

According to our database, Dong-Suk Lee authored at least 3 papers between 2008 and 2015.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2015

26.4 A 21fJ/conv-step 9 ENOB 1.6GS/S 2× time-interleaved FATI SAR ADC with background offset and timing-skew calibration in 45nm CMOS.

Ba-Ro-Saim Sung, Dong-Shin Jo, Il-Hoon Jang, Dong-Suk Lee, Yong-Sang You, Yong-Hee Lee, Ho-Jin Park, Seung-Tak Ryu

Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

26.7 A 2.6b/cycle-architecture-based 10b 1 JGS/s 15.4mW 4×-time-interleaved SAR ADC with a multistep hardware-retirement technique.

Hyeok-Ki Hong, Hyun-Wook Kang, Dong-Shin Jo, Dong-Suk Lee, Yong-Sang You, Yong-Hee Lee, Ho-Jin Park, Seung-Tak Ryu

Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

2008

A low offset rail-to-rail 12b 2MS/s 0.18μm CMOS cyclic ADC.

Young-Ju Kim, Hee-Cheol Choi, Pil-Seon Yoo, Dong-Suk Lee, Joong-Ho Choi, Seung-Hoon Lee

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008