Hyeok-Ki Hong
According to our database1,
Hyeok-Ki Hong
authored at least 11 papers
between 2012 and 2020.
Collaborative distances:
Collaborative distances:
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Bibliography
2020
A 62dB-SNDR 40.2μW 10MS/s ADC for Power Efficient IoT and Biomedical Read-Out Systems.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
2018
A 65 nm 0.08-to-680 MHz Low-Power Synthesizable MDLL With Nested-Delay Cell and Background Static Phase Offset Calibration.
IEEE Trans. Circuits Syst. II Express Briefs, 2018
A Time-Interleaved 12-b 270-MS/s SAR ADC With Virtual-Timing-Reference Timing-Skew Calibration Scheme.
IEEE J. Solid State Circuits, 2018
2017
IEEE Trans. Circuits Syst. I Regul. Pap., 2017
2016
A Sign-Equality-Based Background Timing-Mismatch Calibration Algorithm for Time-Interleaved ADCs.
IEEE Trans. Circuits Syst. II Express Briefs, 2016
A 0.6 V 12 b 10 MS/s Low-Noise Asynchronous SAR-Assisted Time-Interleaved SAR (SATI-SAR) ADC.
IEEE J. Solid State Circuits, 2016
2015
IEEE J. Solid State Circuits, 2015
IEICE Electron. Express, 2015
26.7 A 2.6b/cycle-architecture-based 10b 1 JGS/s 15.4mW 4×-time-interleaved SAR ADC with a multistep hardware-retirement technique.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
2013
An 8.6 ENOB 900MS/s time-interleaved 2b/cycle SAR ADC with a 1b/cycle reconfiguration for resolution enhancement.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013
2012
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012