Edoardo Catapano

According to our database, Edoardo Catapano authored at least 2 papers between 2021 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2022

Methodology for Active Junction Profile Extraction in thin film FD-SOI Enabling performance driver identification in 500°C devices for 3D sequential integration.

Tadeu Mota Frutuoso, Xavier Garros, Perrine Batude, Laurent Brunet, Joris Lacord, Benoit Sklénard, V. Lapras, Claire Fenouillet-Béranger, M. Ribotta, A. Magalhaes-Lucas, J. Kanyandekwe, R. Kies, G. Romano, Edoardo Catapano, Mikaël Cassé, Jose Lugo-Alvarez, Philippe Ferrari, Fred Gaillard

Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

2021

Impact of spacer interface charges on performance and reliability of low temperature transistors for 3D sequential integration.

Tadeu Mota Frutuoso, Jose Lugo-Alvarez, Xavier Garros, Laurent Brunet, Joris Lacord, Louis Gerrer, Mikaël Cassé, Edoardo Catapano, Claire Fenouillet-Béranger, François Andrieu, Fred Gaillard, Philippe Ferrari

Proceedings of the IEEE International Reliability Physics Symposium, 2021