Elkim Roa

Orcid: 0000-0003-0290-7493

According to our database1, Elkim Roa authored at least 60 papers between 2003 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
Analysis and design approach of wideband digital-based feedforward ring oscillators.
Int. J. Circuit Theory Appl., December, 2023

A Phase Noise Model Based on Multi-Loop Control System Theory Applied to Feed-Forward Ring Oscillators.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

2022
A 10pJ/bit 256b AES-SoC Exploiting Memory Access Acceleration.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

2021
On the design of a reliable current reference for systems-on-chip.
Int. J. Circuit Theory Appl., 2021

A digital phase-based on-fly offset compensation method for decision feedback equalisers.
IET Circuits Devices Syst., 2021

A Low-Cost Bug Hunting Verification Methodology for RISC-V-Based Processors.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

Routing-Aware Standard Cell Placement Algorithm Applying Boolean Satisfiability.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

AES Sbox Acceleration Schemes for Low-Cost SoCs.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

Channel Operating Margin as Transceiver Architecture Design Tool.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

Modeling and Characterization of Intra-Body Links for a Smart Contact Lens.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

A 15000 Tuning Range Scalable Feed-Forward Oscillator with 0.05mm<sup>2</sup> Area in CMOS Standard-Cell Format.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020
Energy Efficient Peripheral and System Buses for Low-Area and Low-Power SoC Applications.
IEEE Trans. Circuits Syst. II Express Briefs, 2020

On the Cross-Correlation Based Loop Gain Adaptation for Bang-Bang CDRs.
IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 2020

A single gate oxide level shifter for denser digital domain integration in multiple-supply-voltage applications.
Int. J. Circuit Theory Appl., 2020

Compact on-the-fly-enabled termination with high-current density and ESD compliance.
IET Circuits Devices Syst., 2020

Low-cost TRNG IPs.
IET Circuits Devices Syst., 2020

All-Digital FPGA-based DAC with None or Few External Components.
CoRR, 2020

On the Design of Reliable and Accurate Current References.
Proceedings of the 11th IEEE Latin American Symposium on Circuits & Systems, 2020

A Flexible Debugger for a RISC-V Based 32-bit System-on-Chip.
Proceedings of the 11th IEEE Latin American Symposium on Circuits & Systems, 2020

Simulation and Formal: The Best of Both Domains for Instruction Set Verification of RISC-V Based Processors.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

An All Low-Voltage Devices Level Shifter with Stress Protection for Powering Events.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

A Stable Physically Unclonable Function Based on a Standard CMOS NVR.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

An Energy-Efficient RISC-V RV32IMAC Microcontroller for Periodical-Driven Sensing Applications.
Proceedings of the 2020 IEEE Custom Integrated Circuits Conference, 2020

2019
Defeating Silicon Reverse Engineering Using a Layout-Level Standard Cell Camouflage.
IEEE Trans. Consumer Electron., 2019

Post-Silicon Debugging Platform with Bus Monitoring Capability to Perform Behavioral and Performance Analyses.
Proceedings of the 10th IEEE Latin American Symposium on Circuits & Systems, 2019

On UVM Reliability in Mixed-Signal Verification.
Proceedings of the 10th IEEE Latin American Symposium on Circuits & Systems, 2019

A Low-Area Direct Memory Access Controller Architecture for a RISC-V Based Low-Power Microcontroller.
Proceedings of the 10th IEEE Latin American Symposium on Circuits & Systems, 2019

An Ultra-Low Power Multi-Level Power-on Reset for Fine-Grained Power Management Strategies.
Proceedings of the 10th IEEE Latin American Symposium on Circuits & Systems, 2019

A Programmable and Low-Area On-Die Termination for High-Speed Interfaces.
Proceedings of the 10th IEEE Latin American Symposium on Circuits & Systems, 2019

An All-Thin-Devices Level Shifter in Standard-Cell Format for Auto Place-and-Route Flow.
Proceedings of the 10th IEEE Latin American Symposium on Circuits & Systems, 2019

A Family of Compact Trim-Free CMOS Nano-Ampere Current References.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

A Novel Loop Gain Adaptation Method for Digital CDRs Based on the Cross-Correlation Function.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

Improving Low-Dropout Regulator Frequency Stability by Exploiting the Equivalent Series Resistor and Featuring an Adaptive Biasing Strategy.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

A Compact Industrial-Grade Multi-Threshold Brown-Out Detector.
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019

A 68/36ppm/<sup>○</sup>C Tc 32.768Khz-To-1Mhz Rc-Based Oscillator With 72/6Pj Start-Up Energy.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2019

2018
A Multi-Level Power-on Reset for Fine-Grained Power Management.
Proceedings of the 28th International Symposium on Power and Timing Modeling, 2018

Stochastic resonance in bang-bang phase detector gain and the impact on CDR locking.
Proceedings of the 9th IEEE Latin American Symposium on Circuits & Systems, 2018

A 0.007mm<sup>2</sup> 50mA Three-Stage Fully-Integrated Capacitor-Less Low-Dropout Regulator.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

On-Fly Offset-Correction Method for High-Speed Comparators using All-Digital Phase Measurement.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Standard cell camouflage method to counter silicon reverse engineering.
Proceedings of the IEEE International Conference on Consumer Electronics, 2018

2017
A 65 nm CMOS key establishment core based on tree parity machines.
Integr., 2017

A Digital Offset Reduction Method for Dynamic Comparators Based on Phase Measurement.
Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017

Mitigating Row Hammer attacks based on dummy cells in DRAM.
Proceedings of the IEEE International Conference on Consumer Electronics, 2017

2016
A digital offset correction method for high speed analog front-ends.
Proceedings of the 29th Symposium on Integrated Circuits and Systems Design, 2016

DRAM row-hammer attack reduction using dummy cells.
Proceedings of the IEEE Nordic Circuits and Systems Conference, 2016

A fully-synthesized TRNG with lightweight cellular-automata based post-processing stage in 130nm CMOS.
Proceedings of the IEEE Nordic Circuits and Systems Conference, 2016

On the impact of channel loss on CDR locking.
Proceedings of the IEEE 59th International Midwest Symposium on Circuits and Systems, 2016

A 32-bit RISC-V AXI4-lite bus-based microcontroller with 10-bit SAR ADC.
Proceedings of the IEEE 7th Latin American Symposium on Circuits & Systems, 2016

A 3.9 compression-ratio Huffman encoding scheme for the large ion collider on 65nm and 130nm CMOS technologies.
Proceedings of the IEEE 7th Latin American Symposium on Circuits & Systems, 2016

2014
A 16-channel 38.6 mW/ch fully integrated Analog Front-End for handheld Ultrasound imaging.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2014

2013
A 40Gb/s 860μW single-phase 4: 1 multiplexer in 45nm CMOS.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

2012
A 50GHz 130µW inductorless prescaler in 45nm SOI CMOS using ETSPC logic.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

Material implication in CMOS: a new kind of logic.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012

2010
A methodology to improve yield in analog circuits by using geometric programming.
Proceedings of the 23rd Annual Symposium on Integrated Circuits and Systems Design, 2010

2009
A merged RF CMOS LNA-Mixer design using geometric programming.
Proceedings of the 22st Annual Symposium on Integrated Circuits and Systems Design: Chip on the Dunes, 2009

A low-voltage bandgap reference source based on the current-mode technique.
Proceedings of the 22st Annual Symposium on Integrated Circuits and Systems Design: Chip on the Dunes, 2009

2008
An improved and automated design tool for the optimization of CMOS OTAs using geometric programming.
Proceedings of the 21st Annual Symposium on Integrated Circuits and Systems Design, 2008

A 2.7ua sub1-v voltage reference.
Proceedings of the 21st Annual Symposium on Integrated Circuits and Systems Design, 2008

2007
A small area 8bits 50MHz CMOS DAC for bluetooth transmitter.
Proceedings of the 20th Annual Symposium on Integrated Circuits and Systems Design, 2007

2003
A Methodology for CMOS Low Noise Ampli.er Design.
Proceedings of the 16th Annual Symposium on Integrated Circuits and Systems Design, 2003


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