Marco Sarmiento

Orcid: 0000-0002-3544-8839

According to our database¹, Marco Sarmiento authored at least 14 papers between 2020 and 2023.

Collaborative distances:

Dijkstra number² of five.
Erdős number³ of four.

Timeline

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PhD thesis

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On csauthors.net:

Bibliography

2023

In-NVRAM Unified PUF and TRNG Based on Standard CMOS Technology.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

2022

Systems on a Chip With 8 and 32 Bits Processors in 0.18-μm Technology for IoT Applications.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2022

A Unified PUF and Crypto Core Exploiting the Metastability in Latches.

[BibT_eX]

[DOI]

Future Internet, 2022

ChaCha20-Poly1305 Authenticated Encryption with Additional Data for Transport Layer Security 1.3.

[BibT_eX]

[DOI]

Cryptogr., 2022

A Unified NVRAM and TRNG in Standard CMOS Technology.

[BibT_eX]

[DOI]

IEEE Access, 2022

A Robust and Healthy Against PVT Variations TRNG Based on Frequency Collapse.

[BibT_eX]

[DOI]

IEEE Access, 2022

Trusted Execution Environment Hardware by Isolated Heterogeneous Architecture for Key Scheduling.

[BibT_eX]

[DOI]

IEEE Access, 2022

A 3.65 Gb/s Area-Efficiency ChaCha20 Cryptocore.

[BibT_eX]

[DOI]

Proceedings of the 19th International SoC Design Conference, 2022

2021

A Sub-μ W Reversed-Body-Bias 8-bit Processor on 65-nm Silicon-on-Thin-Box (SOTB) for IoT Applications.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2021

A Fully Digital True Random Number Generator With Entropy Source Based in Frequency Collapse.

[BibT_eX]

[DOI]

IEEE Access, 2021

A Low-Power Low-Area SoC based in RISC-V Processor for IoT Applications.

[BibT_eX]

[DOI]

Proceedings of the 18th International SoC Design Conference, 2021

ChaCha20-Poly1305 Crypto Core Compatible with Transport Layer Security 1.3.

[BibT_eX]

[DOI]

Proceedings of the 18th International SoC Design Conference, 2021

System-on-Chip Implementation of Trusted Execution Environment with Heterogeneous Architecture.

[BibT_eX]

[DOI]

Proceedings of the IEEE Hot Chips 33 Symposium, 2021

2020

A Flexible Debugger for a RISC-V Based 32-bit System-on-Chip.

[BibT_eX]

[DOI]

Wilmer Ramirez

Marco Sarmiento

Elkim Roa

Proceedings of the 11th IEEE Latin American Symposium on Circuits & Systems, 2020

Marco Sarmiento

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