Eonhui Lee

According to our database, Eonhui Lee authored at least 3 papers between 2022 and 2026.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2026

A 48-Gb/s PAM-4 Transceiver With Transition Boosting and RLM Calibration for Next-Generation Memory Interface Testing.

Chan-Ho Kye, Daeho Yun, Jeonghyeon Han, Minsu Park, Kahyun Kim, Kyungmin Baek, Eonhui Lee, Woo-Seok Choi, Deog-Kyoon Jeong, Jooyeol Rhee

IEEE Trans. Very Large Scale Integr. Syst., March, 2026

2023

A PAM4 Level Mismatch Adjustment Scheme for 48-Gb/s PAM4 Memory Tester Bridge.

Daeho Yun, Minsu Park, Kahyun Kim, Kyungmin Baek, Eonhui Lee, Woo-Seok Choi, Deog-Kyoon Jeong

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2023

2022

A 32-Gb/s PAM4-Binary Bridge With Sampler Offset Cancellation for Memory Testing.

Daeho Yun, Eonhui Lee, Woosong Jung, Kahyun Kim, Kyung-Min Beak, Jihee Kim, Hyun Bae Lee, Byeongseon Ko, Woo-Seok Choi, Deog-Kyoon Jeong

IEEE Trans. Circuits Syst. II Express Briefs, 2022