Kahyun Kim

According to our database, Kahyun Kim authored at least 13 papers between 2009 and 2026.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of five.

2026

A 48-Gb/s PAM-4 Transceiver With Transition Boosting and RLM Calibration for Next-Generation Memory Interface Testing.

Chan-Ho Kye, Daeho Yun, Jeonghyeon Han, Minsu Park, Kahyun Kim, Kyungmin Baek, Eonhui Lee, Woo-Seok Choi, Deog-Kyoon Jeong, Jooyeol Rhee

IEEE Trans. Very Large Scale Integr. Syst., March, 2026

A 42-Gb/s Noise-Tolerant Single-Ended Clock-Referenced PAM3 Transceiver for Chiplet Interfaces.

Kahyun Kim, Dae-Hoon Na, Jeongeun Song, Ha-Jung Park, Jin-Seok Heo, Hyunjun Park, Jihee Kim, Hanseok Kim, Hyeri Roh, Jung-Hun Park, Woo-Seok Choi

IEEE J. Solid State Circuits, January, 2026

8.8 A 0.292pJ/b 56Gb/s/wire Capacitively Driven Simultaneous Bidirectional Transceiver with PVT/Mismatch Tracking for XSR and D2D Interfaces in 28nm CMOS.

Kahyun Kim, Yoona Lee, Dae-Hoon Na, Ha-Jung Park, Jeongeun Song, Woo-Seok Choi

Proceedings of the IEEE International Solid-State Circuits Conference, 2026

2025

A Supply Noise-Insensitive Ring DCO With a Self-Biased Shunt Regulator Array in Wide-Range Digital PLL.

Kyungmin Baek, Jiho Kim, Kahyun Kim, Deog-Kyoon Jeong, Min-Seong Choo

IEEE Trans. Very Large Scale Integr. Syst., August, 2025

A 4 × 32 Gb/s 1.8 pJ/bit Collaborative Baud-Rate CDR With Background Eye-Climbing Algorithm and Low-Power Global Clock Distribution.

Jihee Kim, Jia Park, Jiwon Shin, Hanseok Kim, Kahyun Kim, Haengbeom Shin, Ha-Jung Park, Woo-Seok Choi

IEEE J. Solid State Circuits, August, 2025

22.1 A 0.275pJ/b 42Gb/s/pin Clock-Referenced PAM3 Transceiver Tolerant to Supply Noise, Reference Offset and Crosstalk for Chiplets and Short-Reach Memory Interfaces.

Kahyun Kim, Jung-Hun Park, Ha-Jung Park, Jia Park, Jihee Kim, Woo-Seok Choi

Proceedings of the IEEE International Solid-State Circuits Conference, 2025

2023

A 48-Gb/s Single-Ended PAM-4 Receiver with Adaptive Nonlinearity Compensation.

Kahyun Kim, Daeho Yun, Kyungmin Baek, Woo-Seok Choi, Deog-Kyoon Jeong

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

A PAM4 Level Mismatch Adjustment Scheme for 48-Gb/s PAM4 Memory Tester Bridge.

Daeho Yun, Minsu Park, Kahyun Kim, Kyungmin Baek, Eonhui Lee, Woo-Seok Choi, Deog-Kyoon Jeong

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2023

2022

A 32-Gb/s PAM4-Binary Bridge With Sampler Offset Cancellation for Memory Testing.

Daeho Yun, Eonhui Lee, Woosong Jung, Kahyun Kim, Kyung-Min Beak, Jihee Kim, Hyun Bae Lee, Byeongseon Ko, Woo-Seok Choi, Deog-Kyoon Jeong

IEEE Trans. Circuits Syst. II Express Briefs, 2022

A 5GHz All-Digital PLL with shunt regulating Ring DCO in BOST for DDR5 ATE.

Kyungmin Baek, Kahyun Kim, Deog-Kyoon Jeong

Proceedings of the 19th International SoC Design Conference, 2022

2013

Discipline-based instruction to promote interdisciplinary design of wearable and pervasive computing products.

Tom L. Martin, Kahyun Kim, Jason B. Forsyth, Lisa D. McNair, Eloise Coupey, Ed Dorsa

Pers. Ubiquitous Comput., 2013

2011

An Interdisciplinary Undergraduate Design Course for Wearable and Pervasive Computing Products.

Tom L. Martin, Kahyun Kim, Jason B. Forsyth, Lisa D. McNair, Eloise Coupey, Ed Dorsa

Proceedings of the 15th IEEE International Symposium on Wearable Computers (ISWC 2011), 2011

2009

Flexible environment and creativity: a preliminary case study of interdisciplinary student design teams.

Kahyun Kim

Proceedings of the 7th Conference on Creativity & Cognition, Berkeley, 2009