Eric W. MacDonald

Orcid: 0000-0002-9356-1223

According to our database1, Eric W. MacDonald authored at least 25 papers between 1999 and 2023.

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Bibliography

2023
Transient Thermal and Electrical Characteristics of a Cylindrical LiFeS2 Cell with Equivalent Circuit Model.
CoRR, 2023

2022
A Coupled Thermo-Mechanical Dynamic Characterization of Cylindrical Batteries.
IEEE Access, 2022

A Novel Modal Representation of Battery Dynamics.
IEEE Access, 2022

3D-Mold'ed In-Security: Mapping Out Security of Indirect Additive Manufacturing.
Proceedings of the 8th ACM on Cyber-Physical System Security Workshop, 2022

2021
A Conformal, Optimized 3D Printed Kneepad With Deformation Sensing.
IEEE Access, 2021

Toward High Resolution 3D Printing of Shape-Conformable Batteries via Vat Photopolymerization: Review and Perspective.
IEEE Access, 2021

2020
Corrections to "3D Printed Elastomeric Lattices With Embedded Deformation Sensing".
IEEE Access, 2020

3D Printed Elastomeric Lattices With Embedded Deformation Sensing.
IEEE Access, 2020

2019
Digital Manufacturing of Pathologically-Complex 3D Printed Antennas.
IEEE Access, 2019

3D Printed Hybrid Flexible Electronics with Direct Light Synthesis.
Proceedings of the Advances in Additive Manufacturing, Modeling Systems and 3D Prototyping, 2019

2018
Augmenting Computer-Aided Design Software With Multi-Functional Capabilities to Automate Multi-Process Additive Manufacturing.
IEEE Access, 2018

2017
3D Printed Electronics With High Performance, Multi-Layered Electrical Interconnect.
IEEE Access, 2017

2015
A study to detect a material deposition status in fused deposition modeling technology.
Proceedings of the IEEE International Conference on Advanced Intelligent Mechatronics, 2015

2014
3D Printing for the Rapid Prototyping of Structural Electronics.
IEEE Access, 2014

2008
A novel floating gate circuit family with subthreshold voltage swing for ultra-low power operation.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

2006
Delay testing of partially depleted silicon-on-insulator (PD-SOI) circuits.
IEEE Trans. Very Large Scale Integr. Syst., 2006

Robust Ultra-Low Power Subthreshold Logic Flip-Flop Design for Reconfigurable Architectures.
Proceedings of the 2006 IEEE International Conference on Reconfigurable Computing and FPGA's, 2006

Hardware Platforms for Electrostatic Tuning of Mems Gyroscope Using Nature-Inspired Computation.
Proceedings of the Evolvable Hardware, 2006

2005
Reduction of Instantaneous Power by Ripple Scan Clocking.
Proceedings of the 23rd IEEE VLSI Test Symposium (VTS 2005), 2005

Hardware Platforms for MEMS Gyroscope Tuning Based on Evolutionary Computation Using Open-Loop and Closed-Loop Frequency Response.
Proceedings of the Evolvable Systems: From Biology to Hardware, 2005

2004
Low-power weighted pseudo-random BIST using special scan cells.
Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, 2004

2002
A 32-bit PowerPC system-on-a-chip with support for dynamic voltage scaling and dynamic frequency scaling.
IEEE J. Solid State Circuits, 2002

Very Low Voltage Testing of SOI Integrated Circuits.
Proceedings of the 20th IEEE VLSI Test Symposium (VTS 2002), Without Testing It's a Gamble, 28 April, 2002

2000
Testing domino circuits in SOI technology.
Proceedings of the 9th Asian Test Symposium (ATS 2000), 4-6 December 2000, Taipei, Taiwan, 2000

1999
Delay testing of SOI circuits: Challenges with the history effect.
Proceedings of the Proceedings IEEE International Test Conference 1999, 1999


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