Tuyet Nguyen

According to our database1, Tuyet Nguyen authored at least 10 papers between 2002 and 2011.

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Bibliography

2011
Managing High Disease Risk Factors: a use case in the KMR-II Healthcare Infrastructure.
Proceedings of the 5th International RuleML2011@BRF Challenge, 2011

2010

2008
On-chip jitter and oscilloscope circuits using an asynchronous sample clock.
Proceedings of the ESSCIRC 2008, 2008

An on-chip dual supply charge pump system for 45nm PD SOI eDRAM.
Proceedings of the ESSCIRC 2008, 2008

2007
A Distributed Critical-Path Timing Monitor for a 65nm High-Performance Microprocessor.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

A 1V 18GHz Clock Generator in a 65nm PD-SOI Technology.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

Gate Leakage Effects on Yield and Design Considerations of PD/SOI SRAM Designs.
Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007

2004
Resonant clocking using distributed parasitic capacitance.
IEEE J. Solid State Circuits, 2004

2003
Resonant clocking using distributed parasitic capacitance.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2003

2002
A 32-bit PowerPC system-on-a-chip with support for dynamic voltage scaling and dynamic frequency scaling.
IEEE J. Solid State Circuits, 2002


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