Gary D. Carpenter

According to our database, Gary D. Carpenter authored at least 9 papers between 2001 and 2013.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2013

Single-cycle, pulse-shaped critical path monitor in the POWER7+ microprocessor.

Alan J. Drake, Michael S. Floyd, Richard L. Willaman, Derek J. Hathaway, Joshua Hernandez, Crystal Soja, Marshall D. Tiner, Gary D. Carpenter, Robert M. Senger

Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED), 2013

2010

On-Chip Delay Measurement Based Response Analysis for Timing Characterization.

Ramyanshu Datta, Antony Sebastine, Ashwin Raghunathan, Gary D. Carpenter, Kevin J. Nowka, Jacob A. Abraham

J. Electron. Test., 2010

2008

An on-chip dual supply charge pump system for 45nm PD SOI eDRAM.

Jente B. Kuang, Abraham Mathews, John Barth, Fadi H. Gebara, Tuyet Nguyen, Jeremy D. Schaub, Kevin J. Nowka, Gary D. Carpenter, Don Plass, Erik Nelson, Ivan Vo, William R. Reohr, Toshiaki Kirihata

Proceedings of the ESSCIRC 2008, 2008

2007

A Distributed Critical-Path Timing Monitor for a 65nm High-Performance Microprocessor.

Alan J. Drake, Robert M. Senger, Harmander Deogun, Gary D. Carpenter, Soraya Ghiasi, Tuyet Nguyen, Norman K. James, Michael S. Floyd, Vikas Pokala

Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

2006

A Scheme for On-Chip Timing Characterization.

Ramyanshu Datta, Gary D. Carpenter, Kevin J. Nowka, Jacob A. Abraham

Proceedings of the 24th IEEE VLSI Test Symposium (VTS 2006), 30 April, 2006

2003

The design and application of the PowerPC 405LP energy-efficient system-on-a-chip.

Kevin J. Nowka, Gary D. Carpenter, Bishop Brock

IBM J. Res. Dev., 2003

Dynamically Optimized Synchronous Communication for Low Power System on Chip Designs.

Vikas Chandra, Gary D. Carpenter, Jeffrey L. Burns

Proceedings of the 21st International Conference on Computer Design (ICCD 2003), 2003

2002

A 32-bit PowerPC system-on-a-chip with support for dynamic voltage scaling and dynamic frequency scaling.

Kevin J. Nowka, Gary D. Carpenter, Eric W. MacDonald, Hung C. Ngo, Bishop Brock, Koji I. Ishii, Tuyet Nguyen, Jeffrey L. Burns

IEEE J. Solid State Circuits, 2002

2001

Experience with building a commodity Intel-based ccNUMA system.

Bishop Brock, Gary D. Carpenter, Eli Chiprout, Mark E. Dean, Philippe L. De Backer, E. N. Elnozahy, Hubertus Franke, Mark Giampapa, David Glasco, James L. Peterson, Ramakrishnan Rajamony, Rajan Ravindran, Freeman L. Rawson III, Ronald L. Rockhold, Juan Rubio

IBM J. Res. Dev., 2001