Fei Li

Orcid: 0000-0002-2870-3010

Affiliations:
  • A*STAR, Data Storage Institute, Singapore
  • Nanyang Technological University, Singapore (PhD 2013)


According to our database1, Fei Li authored at least 9 papers between 2016 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

Online presence:

On csauthors.net:

Bibliography

2022
Temperature Compensation on SRAM-Based Computation in Memory Array.
Proceedings of the 19th International SoC Design Conference, 2022

2021
Energy Efficient 0.5V 4.8pJ/SOP 0.93μW Leakage/Core Neuromorphic Processor Design.
IEEE Trans. Circuits Syst. II Express Briefs, 2021

2020
Ultra-Low Leakage, High Fan-Out Neuro Connection Map with TCAM-Based LUT, Localized Priority Encoder and Decoder-Less SRAM.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Energy Efficient Reduced Area Overhead Spin-Orbit Torque Non-Volatile SRAMs.
Proceedings of the 46th Annual Conference of the IEEE Industrial Electronics Society, 2020

0.5V 4.8 pJ/SOP 0.93µW Leakage/core Neuromorphic Processor with Asynchronous NoC and Reconfigurable LIF Neuron.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2020

2019
0.54 pJ/bit, 15Mb/s True Random Number Generator Using Probabilistic Delay Cell for Edge Computing Applications.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2019

2018
Energy- and Area-Efficient Spin-Orbit Torque Nonvolatile Flip-Flop for Power Gating Architecture.
IEEE Trans. Very Large Scale Integr. Syst., 2018

Area and Energy Efficient Diode Based Spin Orbit Torque Non-Volatile Latch Design.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

2016
Compact spin transfer torque non-volatile flip flop design for power-gating architecture.
Proceedings of the 2016 IEEE Asia Pacific Conference on Circuits and Systems, 2016


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