Francesco Gregoretti

Orcid: 0000-0003-3822-1215

According to our database1, Francesco Gregoretti authored at least 41 papers between 1980 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
cpp-AIF: A multi-core C++ implementation of Active Inference for Partially Observable Markov Decision Processes.
Neurocomputing, February, 2024

2021
Active Tree Search in Large POMDPs.
CoRR, 2021

A CUDA-based implementation of an improved SPH method on GPU.
Appl. Math. Comput., 2021

2020
Performance and energy-efficient implementation of a smart city application on FPGAs.
J. Real Time Image Process., 2020

2019
Very Low Power Neural Network FPGA Accelerators for Tag-Less Remote Person Identification Using Capacitive Sensors.
IEEE Access, 2019

Towards an Efficient Implementation of an Accurate SPH Method.
Proceedings of the Numerical Computations: Theory and Algorithms, 2019

2017
High-Level Synthesis for Semi-Global Matching: Is the Juice Worth the Squeeze?
IEEE Access, 2017

2014
Mantra 2.0: an online collaborative resource for drug mode of action and repurposing by network analysis.
Bioinform., 2014

3DV - An embedded, dense stereovision-based depth mapping system.
Proceedings of the 2014 IEEE Intelligent Vehicles Symposium Proceedings, 2014

2012
Reverse Engineering and Analysis of Genome-Wide Gene Regulatory Networks from Gene Expression Profiles Using High-Performance Computing.
IEEE ACM Trans. Comput. Biol. Bioinform., 2012

2010
A multi-grained distributed implementation of the parallel Block Conjugate Gradient algorithm.
Concurr. Comput. Pract. Exp., 2010

2009
An Efficient Data Aggregation Algorithm for Cluster-based Sensor Network.
J. Networks, 2009

2008
MGF: A grid-enabled MPI library.
Future Gener. Comput. Syst., 2008

A Framework for Modeling, Simulation and Automatic Code Generation of Sensor Network Application.
Proceedings of the Fifth Annual IEEE Communications Society Conference on Sensor, 2008

An Algorithm for Selecting the Cluster Leader in a Partially Connected Sensor Network.
Proceedings of the 3rd International Conference on Systems and Networks Communications, 2008

Porting application between wireless sensor network software platforms: TinyOS, MANTIS and ZigBee.
Proceedings of 13th IEEE International Conference on Emerging Technologies and Factory Automation, 2008

2007
A Parallel Combustion Solver within an Operator Splitting Context for Engine Simulations on Grids.
Proceedings of the Large-Scale Scientific Computing, 6th International Conference, 2007

2005
MGF: A Grid-Enabled MPI Library with a Delegation Mechanism to Improve Collective Operations.
Proceedings of the Recent Advances in Parallel Virtual Machine and Message Passing Interface, 2005

2004
Implementation of a UMTS Turbo-Decoder on a Dynamically Reconfigurable Platform.
Proceedings of the 2004 Design, 2004

2003
Simulink-Based Codesign and Cosimulation of a Common Rail Injector Test Bench.
J. Circuits Syst. Comput., 2003

2002
Designing low electro magnetic emissions circuits through clock skew optimization.
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002

2001
A High Speed VLSI Architecture for Handwriting Recognition.
J. VLSI Signal Process., 2001

2000
A Case Study in Embedded Systems Design: An Engine Control Unit.
Des. Autom. Embed. Syst., 2000

1999
A Neuro-Fuzzy Real-Time Image Processing System.
Proceedings of the 25th EUROMICRO '99 Conference, 1999

1998
Design and Implementation of the PAPRICA Parallel Architecture.
J. VLSI Signal Process., 1998

Guest Editorial: Special Issue on Special-Purpose Architectures for Real-Time Imaging, Part 3.
Real Time Imaging, 1998

1997
Special Issue on Special-purpose Architectures for Real-Time Imaging, Part 2.
Real Time Imaging, 1997

1996
Performance evaluation and optimization in low-cost cellular SIMD systems.
Microprocess. Microprogramming, 1996

Design and Implementation of the Control Structure of the PAPRICA-3 Processor.
Proceedings of the 4th Euromicro Workshop on Parallel and Distributed Processing (PDP '96), 1996

1995
Using a massively parallel architecture for integrated circuits testing.
Proceedings of the 3rd Euromicro Workshop on Parallel and Distributed Processing (PDP '95), 1995

1994
PAPRICA-3: A Real-Time Morhphological Image Processor.
Proceedings of the Proceedings 1994 International Conference on Image Processing, 1994

1993
A Neural Network Chip Using CPWM Modulation.
Proceedings of the New Trends in Neural Computation, 1993

The PAPRICA SIMD array: Critical reviews and perspectives.
Proceedings of the International Conference on Application-Specific Array Processors, 1993

1992
A chip set implementation of a parallel cellular architecture.
Microprocess. Microprogramming, 1992

A Low-Cost Parallel VLSI Architecture for Low-Level Vision.
Proceedings of IAPR Workshop on Machine Vision Applications, 1992

1989
Use of Pulse Rate and Width Modulations in a Mixed Analog/digital Cell for Artificial Neural Systems.
Proceedings of the Neurocomputing - Algorithms, Architectures and Applications, Proceedings of the NATO Advanced Research Workshop on Neurocomputing Algorithms, Architectures and Applications, Les Arcs, France, February 27, 1989

1986
Programming for observability support in a parallel programming environment.
Proceedings of the 14th ACM Annual Conference on Computer Science, 1986

1983
Modeling Bus Contention and Memory Interference in a Multiprocessor System.
IEEE Trans. Computers, 1983

1982
The μ Project: An Experience with a Multimicroprocessor System.
IEEE Micro, 1982

An Experimental Real Time Kernel for a Multimicroprocessor Prototype.
Proceedings of the Proceedings of the 3rd International Conference on Distributed Computing Systems, 1982

1980
MIL project: a microcomputer integrated laboratory.
Microprocess. Microsystems, 1980


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