Franz Kuttner

According to our database, Franz Kuttner authored at least 11 papers between 2002 and 2017.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2017

13.2 A digital multimode polar transmitter supporting 40MHz LTE Carrier Aggregation in 28nm CMOS.

Michael Fulde, Alexander Belitzer, Zdravko Boos, Michael Bruennert, Jonas Fritzin, Hans Geltinger, Marcus Groinig, Daniel Gruber, Simon Gruenberger, Thomas Hartig, Vahur Kampus, Boris Kapfelsperger, Franz Kuttner, Stephan Leuschner, Thomas Maletz, Andreas Menkhoff, José Moreira, Alan Paussa, Davide Ponton, Harald Pretl, Daniel Sira, Ulrich Steinacker, Nenad Stevanovic

Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

2011

A digitally controlled DC-DC converter for SoC in 28nm CMOS.

Franz Kuttner, Harun Habibovic, Thomas Hartig, Michael Fulde, Gernot Babin, Andreas Santner, Peter Bogner, Claus Kropf, Harald Riesslegger, Uwe Hodel

Proceedings of the IEEE International Solid-State Circuits Conference, 2011

A fully digital multimode polar transmitter employing 17b RF DAC in 3G mode.

Zdravko Boos, Andreas Menkhoff, Franz Kuttner, Markus Schimper, José Moreira, Hans Geltinger, Timo Gossmann, Peter Pfann, Alexander Belitzer, Thomas Bauernfeind

Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2010

A mixer-filter combination of a direct conversion receiver for DVB-H applications in 65nm CMOS.

Heimo Uhrmann, Lukas Dörrer, Franz Kuttner, Kurt Schweiger, Horst Zimmermann

Proceedings of the 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2010

2008

A Continuous Time ΔΣ ADC for Voice Coding with 92dB DR in 45nm CMOS.

Lukas Dörrer, Franz Kuttner, Andreas Santner, Claus Kropf, Thomas Puaschitz, Thomas Hartig, Manfred Punzenberger

Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

2006

A 14b 100MS/s digitally self-calibrated pipelined ADC in 0.13µm CMOS.

Peter Bogner, Franz Kuttner, Claus Kropf, Thomas Hartig, Markus Burian, Hermann Eul

Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

2005

A 6-bit 1.2-GS/s low-power flash-ADC in 0.13-μm digital CMOS.

Christoph Sandner, Martin Clara, Andreas Santner, Thomas Hartig, Franz Kuttner

IEEE J. Solid State Circuits, 2005

A 3-mW 74-dB SNR 2-MHz continuous-time delta-sigma ADC with a tracking ADC quantizer in 0.13-μm CMOS.

Lukas Dörrer, Franz Kuttner, Patrizia Greco, Patrick Torta, Thomas Hartig

IEEE J. Solid State Circuits, 2005

2004

A 6bit, 1.2GSps Low-Power Flash-ADC in 0.13µm Digital CMOS.

Christoph Sandner, Martin Clara, Andreas Santner, Thomas Hartig, Franz Kuttner

Proceedings of the 2004 Design, 2004

2003

10-bit, 3 mW continuous-time sigma-delta ADC for UMTS in a 0.12 μm CMOS process.

Lukas Dörrer, Franz Kuttner, Andreas Wiesbauer, Antonio Di Giandomenico, Thomas Hartig

Proceedings of the ESSCIRC 2003, 2003

2002

A 1.8 V fully embedded 10 b 160 MS/s two-step ADC in 0.18 μm CMOS.

Martin Clara, Andreas Wiesbauer, Franz Kuttner

Proceedings of the IEEE 2002 Custom Integrated Circuits Conference, 2002