Christoph Sandner

Orcid: 0000-0002-3814-7476

According to our database¹, Christoph Sandner authored at least 27 papers between 2002 and 2020.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of four.

Timeline

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PhD thesis

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On csauthors.net:

Bibliography

2020

Optimized Driver Design for Integrated Reconfigurable Switched Capacitor Converters.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019

Global Optimization of Reconfigurable Switched Capacitor DC-DC Converters.

[BibT_eX]

[DOI]

Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019

2015

5.8 A digitally assisted single-point-calibration CMOS bandgap voltage reference with a 3σ inaccuracy of ±0.08% for fuel-gauge applications.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

F3: Cutting the last wire - Advances in wireless power.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

A folding dickson-based fully integrated wide input range capacitive DC-DC converter achieving Vout/2-resolution and 71% average efficiency.

[BibT_eX]

[DOI]

Athanasios Sarafianos

Joachim Pichler

Christoph Sandner

Michiel Steyaert

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2015

2013

F5: Frequency generation and clock distribution.

[BibT_eX]

[DOI]

Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

Power management.

[BibT_eX]

[DOI]

Christoph Sandner

Rajeevan Amirtharajah

Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013

2012

Power management.

[BibT_eX]

[DOI]

William McIntyre

Christoph Sandner

Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012

2011

Switched capacitor DC-DC converter in 65nm CMOS technology with a peak efficiency of 97%.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

Automatic dead time optimization in a high frequency DC-DC buck converter in 65 nm CMOS.

[BibT_eX]

[DOI]

Proceedings of the 37th European Solid-State Circuits Conference, 2011

Fast and robust level shifters in 65 nm CMOS.

[BibT_eX]

[DOI]

Proceedings of the 37th European Solid-State Circuits Conference, 2011

2010

A sensor concept for minimizing body diode conduction losses in DC/DC converters.

[BibT_eX]

[DOI]

Proceedings of the 36th European Solid-State Circuits Conference, 2010

2009

Analysis and Design of an Integrated Notch Filter for the Rejection of Interference in UWB Systems.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2009

2008

UWB Fast-Hopping Frequency Generation Based on Sub-Harmonic Injection Locking.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2008

Power supply generation and battery management for energy efficient SDR.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Acoustics, 2008

2007

Transformer-Based Dual-Mode Voltage-Controlled Oscillators.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2007

A 0.13μm CMOS LNA with Integrated Balun and Notch Filter for 3-to-5GHz UWB Receivers.

[BibT_eX]

[DOI]

Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

Quadrature VCOs Based on Coupled PLLs.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

An analog front-end with integrated notch filter for 3-5 GHz UWB receivers in 0.13 μm CMOS.

[BibT_eX]

[DOI]

Proceedings of the 33rd European Solid-State Circuits Conference, 2007

2006

A WiMedia/MBOA-Compliant CMOS RF Transceiver for UWB.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2006

2005

A 6-bit 1.2-GS/s low-power flash-ADC in 0.13-μm digital CMOS.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2005

ESD-protected CMOS 3-5 GHz wideband LNA+PGA design for UWB.

[BibT_eX]

[DOI]

Proceedings of the 31st European Solid-State Circuits Conference, 2005

2004

Fully integrated ultra wide band CMOS low noise amplifier.

[BibT_eX]

[DOI]

Proceedings of the 33rd European Solid-State Circuits Conference, 2004

A 6bit, 1.2GSps Low-Power Flash-ADC in 0.13µm Digital CMOS.

[BibT_eX]

[DOI]

Proceedings of the 2004 Design, 2004

2003

A subpicosecond jitter PLL for clock generation in 0.12-μm digital CMOS.

[BibT_eX]

[DOI]

Nicola Da Dalt

Christoph Sandner

IEEE J. Solid State Circuits, 2003

2002

A fully integrated analog front-end macro for cable modem applications in 0.18-μm CMOS.

[BibT_eX]

[DOI]

Christian Fleischhacker

IEEE J. Solid State Circuits, 2002

A fully integrated 2.4-GHz LC-VCO frequency synthesizer with 3-ps jitter in 0.18-μm standard digital CMOS copper technology.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2002

Christoph Sandner

Timeline

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