Andreas Wiesbauer

According to our database1, Andreas Wiesbauer authored at least 36 papers between 2001 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
A VCO-ADC Linearized by a Capacitive Frequency-to-Current Converter.
IEEE Trans. Circuits Syst. II Express Briefs, June, 2023

A 22dBA digital optical MEMS microphone.
Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023

2022
An Analysis of Noise in Multi-Bit ΣΔ Modulators with Low-Frequency Input Signals.
Sensors, 2022

MEMS optical microphone based on light phase modulation.
Proceedings of the 52nd IEEE European Solid-State Device Research Conference, 2022

A 69dBA-730µW Silicon Microphone System with Ultra & Infra-Sound Robustness.
Proceedings of the 48th IEEE European Solid State Circuits Conference, 2022

2021
A 73dB-A Audio VCO-ADC Based on a Maximum Length Sequence Generator in 130nm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs, 2021

2019
A VCO-Based CMOS Readout Circuit for Capacitive MEMS Microphones.
Sensors, 2019

2018
SNDR Limits of Oscillator-Based Sensor Readout Circuits.
Sensors, 2018

0.04-mm<sup>2</sup> 103-dB-A Dynamic Range Second-Order VCO-Based Audio ΣΔ ADC in 0.13-µm CMOS.
IEEE J. Solid State Circuits, 2018

2017
9.5 A 1.8V true-differential 140dB SPL full-scale standard CMOS MEMS digital microphone exhibiting 67dB SNR.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

2016
Signal boosting to extend the bandwidth of oversampled converters.
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

2015
A MEMS microphone interface based on a CMOS LC oscillator and a digital sigma-delta modulator.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

2014
A time-encoding CMOS capacitive sensor readout circuit with flicker noise reduction.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

2010
A/D Conversion Using Asynchronous Delta-Sigma Modulation and Time-to-Digital Conversion.
IEEE Trans. Circuits Syst. I Regul. Pap., 2010

Exploiting time resolution in nanometre CMOS data converters.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

A 0.08 mm2, 7mW Time-Encoding Oversampling Converter with 10 bits and 20MHz BW in 65nm CMOS.
Proceedings of the 36th European Solid-State Circuits Conference, 2010

2009
A 0.1 mm<sup>2</sup>, Wide Bandwidth Continuous-Time ΔΣ ADC Based on a Time Encoding Quantizer in 0.13 µm CMOS.
IEEE J. Solid State Circuits, 2009

A holistic design approach for systems on chip.
Proceedings of the Annual IEEE International SoC Conference, SoCC 2009, 2009

2008
A/D conversion using an Asynchronous Delta-Sigma Modulator and a time-to-digital converter.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

2006
A WiMedia/MBOA-Compliant CMOS RF Transceiver for UWB.
IEEE J. Solid State Circuits, 2006

Clock jitter compensation for current steering DACs.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Spectral shaping of clock jitter errors for continuous time sigma-delta modulators.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Design of Cascaded Continuous-Time Sigma-Delta Modulators.
Proceedings of the 13th IEEE International Conference on Electronics, 2006

2004
A 70-mW 300-MHz CMOS continuous-time ΣΔ ADC with 15-MHz bandwidth and 11 bits of resolution.
IEEE J. Solid State Circuits, 2004

Modelling and optimization of low pass continuous-time sigma delta modulators for clock jitter noise reduction.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

Nonlinear distortion in current-steering D/A-converters due to asymmetrical switching errors.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

Fully integrated ultra wide band CMOS low noise amplifier.
Proceedings of the 33rd European Solid-State Circuits Conference, 2004

Linearity enhancement techniques in low OSR, high clock rate multi-bit continuous-time sigma-delta modulators.
Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004

2003
A 85-dB dynamic range multibit delta-sigma ADC for ADSL-CO applications in 0.18-μm CMOS.
IEEE J. Solid State Circuits, 2003

A 10-bit, 4 mW continuous-time sigma-delta ADC for UMTS in a 0.12µm CMOS process.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

A 15 MHz bandwidth sigma-delta ADC with 11 bits of resolution in 0.13μm CMOS.
Proceedings of the ESSCIRC 2003, 2003

10-bit, 3 mW continuous-time sigma-delta ADC for UMTS in a 0.12 μm CMOS process.
Proceedings of the ESSCIRC 2003, 2003

2002
A fully integrated analog front-end macro for cable modem applications in 0.18-μm CMOS.
IEEE J. Solid State Circuits, 2002

An ADSL-RT full-rate analog front end IC with integrated line driver.
IEEE J. Solid State Circuits, 2002

A 1.8 V fully embedded 10 b 160 MS/s two-step ADC in 0.18 μm CMOS.
Proceedings of the IEEE 2002 Custom Integrated Circuits Conference, 2002

2001
A 800 mW, full-rate ADSL-RT analog frontend IC with integrated line driver.
Proceedings of the IEEE 2001 Custom Integrated Circuits Conference, 2001


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