Lukas Dörrer

According to our database1, Lukas Dörrer authored at least 10 papers between 2003 and 2017.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2017
A CT ΔΣ ADC with 9/50MHz BW achieving 73/71dB DR designed for robust blocker tolerance in 14nm FinFET.
Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017

2015
A multimode CT ΔΣ-modulator with a reconfigurable digital feedback filter for semi-digital blocker/interferer rejection.
Proceedings of the ESSCIRC Conference 2015, 2015

2012
A system containing an ambient light and a proximity sensor with intrinsic ambient light rejection.
Proceedings of the 38th European Solid-State Circuit conference, 2012

2010
A mixer-filter combination of a direct conversion receiver for DVB-H applications in 65nm CMOS.
Proceedings of the 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2010

2008
A Continuous Time ΔΣ ADC for Voice Coding with 92dB DR in 45nm CMOS.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

2005
A 3-mW 74-dB SNR 2-MHz continuous-time delta-sigma ADC with a tracking ADC quantizer in 0.13-μm CMOS.
IEEE J. Solid State Circuits, 2005

2004
A 3mW continuous-time ΣΔ-modulator for EDGE/GSM with high adjacent channel tolerance.
Proceedings of the 33rd European Solid-State Circuits Conference, 2004

2003
A 10-bit, 4 mW continuous-time sigma-delta ADC for UMTS in a 0.12µm CMOS process.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

A 15 MHz bandwidth sigma-delta ADC with 11 bits of resolution in 0.13μm CMOS.
Proceedings of the ESSCIRC 2003, 2003

10-bit, 3 mW continuous-time sigma-delta ADC for UMTS in a 0.12 μm CMOS process.
Proceedings of the ESSCIRC 2003, 2003


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