Fuzhan Chen

Orcid: 0000-0001-8902-302X

According to our database1, Fuzhan Chen authored at least 13 papers between 2021 and 2026.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
A 48-Gb/s Inductorless PAM-4 Optical Receiver With 1.28-pJ/bit Efficiency in 28-nm CMOS.
IEEE J. Solid State Circuits, May, 2026

A 40Gb/s 8mW-OMA 1-to-N VCSEL Driver for Parallel and Wireless Optical Links Using 150nm GaN HEMT.
Proceedings of the IEEE International Solid-State Circuits Conference, 2026

2025
A 56-Gb/s PAM-4 VCSEL Transmitter With Piecewise Compensation Scheme in 40-nm CMOS.
IEEE J. Solid State Circuits, November, 2025

A 0.32-pJ/b 100-Gb/s PAM-4 TIA in 28-nm CMOS.
IEEE Solid State Circuits Lett., 2025

A 100Gbaud 4Vppd Distributed Linear Driver with Cross-Folded Transmission Lines and Cross-Coupled Gm Cells for Built-in 5-Tap FFE in 0.13µm SiGe BiCMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2025

2024
A 48-Gb/s Half-Rate PAM4 Optical Receiver with 0.27-pJ/bit TIA Efficiency, 1.28-pJ/bit RX Efficiency, and 0.06-mm<sup>2</sup> area in 28-nm CMOS.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

A 56-Gbaud 7.3-Vppd Linear Modulator Transmitter with AMUX-Based Reconfigurable FFE and Dynamic Triple-Stacked Driver in 130-nm SiGe BiCMOS.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2024

2023
A Power-Efficient $\boldsymbol{4}-\mathbf{V}_{\mathbf{ppd}}$ 128-Gb/s PAM-4 Optical Modulator Driver with Merged BV Doubler Topology in 130-nm BiCMOS.
Proceedings of the IEEE International Conference on Integrated Circuits, 2023

A 2.05-pJ/b 56-Gb/s PAM-4 VCSEL Transmitter with Piecewise Nonlinearity Compensation and Asymmetric Equalization in 40-nm CMOS.
Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023

2022
A 56-Gb/s PAM-4 Transmitter Using Silicon Photonic Microring Modulator in 40nm CMOS.
Proceedings of the 65th IEEE International Midwest Symposium on Circuits and Systems, 2022

A 4-Vppd160-Gb/s PAM-4 Optical Modulator Driver with All-Pass Filter-Based Dynamic Bias and 2- Tap FFE in 130-nm BiCMOS.
Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2022

2021
An Integrated System Evaluation Engine for Cross-Domain Simulation and Design Optimization of High-Speed 5G Millimeter-Wave Wireless SoCs.
Proceedings of the 14th IEEE International Conference on ASIC, 2021

Design and Co-Simulation of QPSK and NRZ/PAM-4/PAM-8 VCSEL-Based Optical Links Utilizing an Integrated System Evaluation Engine.
Proceedings of the 14th IEEE International Conference on ASIC, 2021


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